Bharath Kumar N Email & Phone Number

Cupertino, Ca, Us

Cupertino, California, Us

Working on SerDes

San Diego, Ca, Us

La Jolla, Ca, Us

TA for ECE-100: Linear Electronic Systems under Prof. Drew Hall- Conducted weekly lab sessions guiding undergrad students in circuit building assignments covering discrete filter design, oscillator design, clearing conceptual doubts etc

La Jolla, Ca, Us

- Lead TA for a newly offered course ECE279 (sponsored by Apple and Keysight) - Analog IC Lab under Prof. Drew Hall at UCSD- Guided grad students in designing PCBs and setting up lab automation infrastructure to measure a taped out ADC chip.- First ever course in UCSD to involve measurement of a chip taped out by students.

San Jose, California, Us

- Carried out PCIe Gen 1,2,3,4,5 receiver electrical validation on Cadence's first Gen 5 capable design IP and played a critical role in delivering the final IP characterization report to customers on time. I was also involved in planning out the validation cycle and debugging critical issues related to certain analog blocks, ESD failures, passing receiver jitter tolerance compliance tests etc.- Received 12 recognition awards for contributions that led to efficient execution of several projects.- Received 'Quarterly Champ' award for Q1 2021 for cutting down USB receiver electrical validation time by half, thus expediting customer deliveries of Cadence IP.

San Jose, California, Us

- Performed electrical validation of several serdes PHYs - PCIe Gen 1,2,3 receiver, DPHY transmitter and receiver in TSMC 16nm, 12nm and 7nm nodes.- Responsible for high speed board design to enable validation of DPHY. DPHY's Tx required tricky termination design on board and tackling this was important in carrying on with the validation process smoothly.- Acquired knowledge on implementing the DPHY PPI controller on FPGA and enabling the controller-PHY inter-operation for the electrical setup.- Gained expertise in operating Keysight's 65 Gsa/s Arbitrary Waveform Generator, 20GHz and 33GHz digital signal analyzers, high speed BERTs, active probe soldering, automation of data collection etc.

Chennai, Tamilnadu, In

Lab - Optical Communication and Networking Lab (OCEAN), Dept. of Electrical Engineering.Project - 1. Worked on implementing a framework for simulating 'Synchronous TDM' frames (used in digital telephony) in a network simulating framework 'OMNeT++'. This involved extensive study of the ways in which TDM frames were controlled in the data link layer before sending to the copper line. Even as landline and fixed telephone lines are slowly being retired and a shift to VoIP is being seen, the reliability and sturdiness of TDM is being ported to VoIP. Thus the concept of TDM remains relevant albeit in the context of packet switching networks. This activity was successful in setting up a simulating framework for this.2. Demonstrated the processing capability of ARM based Raspberry Pi 3 - set up the OMNeT++ suite on Raspberry Pi 3 with Ubuntu mate OS and simulated sample TDM frame transmission on OMNeT++ programs successfully.

Master Of Science - Ms, Electronic Circuits And Systems

Bachelor Of Technology (B.Tech.), Electrical, Electronics And Communications Engineering

12Th (Cbse), Physics, Computer Science, Chemistry, Mathematics

10Th (Cbse)