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• RF / Analog / Mixed signal design Memory IO PHY circuit design in cutting edge process technology High performance level shifter circuit design in cutting edge process technology High performance fully integrated low-dropout voltage regulator design in cutting edge process technology High Speed Analog IC design – FIR filter to realize specified transfer function in GHz range Realize the first integrated real-time spectrum analyzer for UWB signal in CMOS process Deep understanding of Phase Lock Loop System Architecture for Circuits (Analog, Mixed Signal, Digital Designs) Deep understanding of Wireless Communication Circuits and Systems• ESD design Deep understanding of HBM, CDM model of ESD event Hands-on experience with ESD simulation tools to achieve reliable ESD designs in cutting edge process technology • E-Test Thorough and deep understanding of the Memory IO packaging strategy and test flows• High Speed Optical Network Design and Optoelectronics• Strong project management skills with the ability to conduct multiple projects simultaneously• Very high level of attention to detail, self-troubleshooting, structured problem solving skill• Highly self-motivated individual, goal oriented and team player
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Component Design Engineer - Ptd/Advanced DesignIntel Corporation Nov 2013 - PresentSanta Clara, California, Us• RF / Analog / Mixed signal designMemory IO PHY circuit designHigh performance level shifter circuit designHigh performance fully integrated low-dropout voltage regulator designDeep understanding of Phase Lock Loop System Architecture for Circuits (Analog, Mixed Signal, Digital Designs)Deep understanding of Wireless Communication Circuits and Systems -
Reliability Engineer - Quality And Reliability OrganizationIntel Corporation Sep 2012 - PresentSanta Clara, California, UsDesigning DFT circuit.High performance LDO design in cutting edge process technology. -
Phd CandidateCornell University Aug 2007 - Aug 2012Ithaca, Ny, UsHigh Speed CMOS Analog Signal ProcessingProposed the hardware realization of the high speed integrated adaptive FIR filter in IBM 130nm CMOS process. Applications include design of the filters with designate magnitude and phase responses such as equalizers in I/O circuitry.Proposed the hardware realization of the integrated time-stretching system in IBM 130nm CMOS process.Performed the experimental demonstration of the real time analog signal processing scheme. Taped out in IBM 130nm CMOS process.Publications:[1] Bo Xiang, Xiao Wang, and Alyssa Apsel, “A Reconfigurable Integrated Dispersive Delay Line (DDL) in 0.13 µm CMOS Process”, IEEE Transactions on Microwave Theory and Techniques, Vol. 61, No. 7, pp. 2610-2619, July 2013.[2] Bo Xiang, Xiao Wang, and Alyssa Apsel, “On-Chip Demonstration of Real Time Spectrum Analysis (RTSA) Using Integrated Dispersive Delay Line (IDDL)”, IEEE International Microwave Symposium 2013, TH1D-4, Seattle, WA, Jun. 2013.[3] Bo Xiang, Anthony Kopa, Zhongtao Fu, and Alyssa B. Apsel, "Theoretical Analysis and Practical Considerations For The Integrated Time-Stretching System Using Dispersive Delay Line (DDL)", IEEE Transactions on Microwave Theory and Techniques, Vol. 60, No. 11, pp. 3449-3457, Nov. 2012. [4] Bo Xiang, Anthony Kopa, Zhongtao Fu, and Alyssa B. Apsel, “An Integrated Ku-Band Nanosecond Time-Stretching System Using Improved Dispersive Delay Line (DDL)”, IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), pp. 151-154, Jan. 2012.[5] Bo Xiang, Anthony Kopa, and Alyssa B. Apsel, "A Novel On-chip Active Dispersive Delay Line (DDL) for Analog Signal Processing," IEEE Microwave and Wireless Components Letters, Vol. 20, No. 10, pp.584-586 Oct. 2010.[6] Bo Xiang, and Alyssa B. Apsel, "A Distributed Amplifier Based Dispersive Delay Line," IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1005-1008, May 2011. -
Graduate Research AssistantUcd (University Of California) 2005 - 2007High Speed / Capacity Optical Network DesignExperimentally demonstrated the optical label switching and header techniquesPerformed wavelength conversion with Arrayed Waveguide Grating (AWG)Developed the optical regeneration techniques Developed and improved the optical clock recovery techniques
Bo Xiang Skills
Bo Xiang Education Details
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Cornell UniversityElectrical And Computer Engineering -
University Of California, DavisElectrical & Computer Engineering -
Peking UniversityElectrical And Computer Engineering
Frequently Asked Questions about Bo Xiang
What company does Bo Xiang work for?
Bo Xiang works for Intel Corporation
What is Bo Xiang's role at the current company?
Bo Xiang's current role is Component Design Engineer at Intel Corporation.
What is Bo Xiang's email address?
Bo Xiang's email address is bx****@****ell.edu
What schools did Bo Xiang attend?
Bo Xiang attended Cornell University, University Of California, Davis, Peking University.
What skills is Bo Xiang known for?
Bo Xiang has skills like Matlab, Cadence Virtuoso, Ic, Integrated Circuit Design, Verilog, C++, Spice, C, Vhdl, Linux, Network Analyzer, Hspice.
Who are Bo Xiang's colleagues?
Bo Xiang's colleagues are Leah Strength, Chad Wren, Mohamad Mukhlis Baharudin, Shruti Sampagavi, 吴传强, Sabrina Wahid, Hee Hwan Kwak.
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