Bob Hardin Email & Phone Number

In charge of processing 4" GaAs and InP wafers in a 10,000 sq. ft. Class 10 cleanroom.> 12/2005 – Manager, InP Development Lab, in charge of all Process and Equipment Maintenance technicians processing 4” GaAs and InP wafers to produce state-of-the-art, integrated circuits to meet customer commitments.> Supported Production arm of DARPA team which produced world class, advanced InP circuits that set records for speed and integration levels. Set production cycle time record of 1-week turnaround for critical customer.> Recruited, staffed, and trained both process and equipment personnel to support End-Of-Life delivery of production parts by the Fab Shutdown date of Sept 30, 2007.> 11/2002 –Manager, Fab 1, in charge of Process and Equipment Engineering groups, managing 18 Process Technicians and 6 Equipment Engineering Technicians on a 24/5 schedule.> Worked to consistently improve Fab performance, product quality, and meet delivery goals.

> 12/1997 – Transferred to Litho/Etch Engineering Section Manager, overseeing 6 Process Engineers and 4 Engineering Technicians on 4 shifts supporting a 24/7 Fab production schedule.> Planned and supervised equipment, process optimization projects with Engineers, Technicians.> Evaluated merits of engineering change proposals using formal White Paper review process used to maintain process stability.> Managed installation and acceptance of new Laser ID and Overlay measurement tools.> Analyzed ESD issues with reticle and implemented preventive solution (ambient air ionization, storage, carriers, inspection, and training).> Developed OCAP (Out of Control Action Procedure) checklists for process recovery by production personnel.§ Managed Engineering and Production Task Management systems to automate performance of routine maintenance tasks.

> 11/1995 – Promoted to Senior MTS. Implemented major new process technology and equipment, began assuming additional responsibilities in the Etch area.> Implemented new reticle storage system. Developed and implemented process advances, such as Anti-Reflective Coating.> 04/1987 – Joined Vitesse as a Member of the Technical Staff (MTS), solely responsible for 3” GaAs Photolithography process and equipment.§ Co-developed and characterized a new photoresist process, implemented pellicle protection for reticles, instituted Statistical Process Control charts, wrote equipment and process qualification specifications.> Principal role in selecting, installing, characterizing 4” equipment and process transfer. Trained new engineers and technicians, developing certification methods that were used as models for the company.

> 10/1985 – Engineering Supervisor, Adv. Tech. Dev. Group. In charge of 3 Engineers and associated Engineering Technicians doing lithography of advanced CMOS and Bipolar submicron circuits using 1X, 5X, 10X imaging systems.> 11/1982 – Process Development Engineer, responsible for startup of new semiconductor Fab and all tasks related to installing and characterizing new Lithographic process equipment, including 1X/5X wafer steppers and aligners, coat/develop track equipment, mask cleaners and CD (critical dimension) measurement equipment.> 08/1981 – Process Engineering Technician, responsible for all lithographic processing in advanced lithographic minilab. Installed and characterized all equipment and setup initial process. Evaluated and implemented new process equipment techniques, and improvements.> 06/1973 – Process Engineering Technician – Promoted through 4 grade levels in 8 years. Performed all tasks necessary for engineering prototype PC board fabrication.

Assoc. Arts, Electronics

Associate of Electronic Arts degree.

Marine Biology, Chemistry

Focus on Marine Biology, Organic and Inorganic Chemistry.