Bofeng Chen

Bofeng Chen Email and Phone Number

Principal @
Bofeng Chen's Location
Shanghai, China, China
Bofeng Chen's Contact Details

Bofeng Chen work email

Bofeng Chen personal email

n/a
About Bofeng Chen

18+ years IC design and verification experience. Knowledge of WLAN/WCDMA wireless communication technologies and Ethernet/networking.Specialties: Related areas of exprence are:• Functional verification(VMM/SVA/Formal)• Formal verification(Equivalence check/Property check)• RTL coding(Verilog/VHDL)• FPGA emulation and development• Perl/Tcl coding in design flow• Logic synthesis• Static timing analysis

Bofeng Chen's Current Company Details
Renesas

Renesas

Principal
Bofeng Chen Work Experience Details
  • Renesas
    Principal
    Renesas Jan 2020 - Present
    中国 上海市 徐汇区
    Memory interface verification
  • Amd
    Pmts
    Amd Sep 2019 - Dec 2019
    上海
    GPU verification
  • Kindroid
    Principal
    Kindroid Jun 2018 - Aug 2019
    上海 浦东新区
  • 展讯
    Senior Staff
    展讯 Mar 2015 - May 2018
    Shanghai
    Wifi IP verification with UVM methodology
  • Lsi, An Avago Technologies Company
    Verification Manager
    Lsi, An Avago Technologies Company Dec 2012 - Nov 2014
    Shanghai
    Preamp mixed-signal verification with UVM methodology
  • Qualcomm Atheros
    Manager, Design Verification
    Qualcomm Atheros Oct 2007 - Jul 2012
    Shanghai
    1. build and manage DV team 2. transfer verification methodology from verilog to mixture of VMM/SVA/Formal.3. lead DV team to build VMM verification environment and fully verify Ethernet switch/LOM(LAN on motherborad) ASIC chip on module/sub-system/chip level.
  • Auvitek Technology
    Manager, Asic Design
    Auvitek Technology Dec 2006 - Sep 2007
    Shang Hai
    1. module integration and use verilog/assertion to verify ATSC chips2.algorithm and verilog implementation research on DVB-T(OFDM)
  • Infineon Technologies
    Senior Design Engineer/Team Leader
    Infineon Technologies Dec 2003 - Nov 2006
    Xi'An/Munich
    1.expert support on formal property check2.verify DECT and ADSL/VDSL chips in VHDL/verilog environment
  • Zte Microelectronics Institute
    Chief Engineer/Team Leader
    Zte Microelectronics Institute Oct 2000 - Nov 2003
    Shenzhen
    Focus on verilog design,verification and FPGA test of WCDMA UE/NodeB baseband
  • Huawel Electrical Technology Co,. Ltd.
    Development Engineer
    Huawel Electrical Technology Co,. Ltd. Jan 2000 - Sep 2000
    Shen Zhen
    Focus on board level hardware/assembly code development of power converter.

Bofeng Chen Skills

Asic Wireless Verilog Semiconductors

Bofeng Chen Education Details

Frequently Asked Questions about Bofeng Chen

What company does Bofeng Chen work for?

Bofeng Chen works for Renesas

What is Bofeng Chen's role at the current company?

Bofeng Chen's current role is Principal.

What is Bofeng Chen's email address?

Bofeng Chen's email address is bo****@****ros.com

What schools did Bofeng Chen attend?

Bofeng Chen attended University Of Petroleum (East China), University Of Petroleum (East China).

What skills is Bofeng Chen known for?

Bofeng Chen has skills like Asic, Wireless, Verilog, Semiconductors.

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