Brett Nicholas Email & Phone Number

Salt Lake City, UT, US

Edmonds, WA, US

Salt Lake City, Utah, US

• Led team of four engineers to develop all embedded microcontroller firmware for the Guardian XO powered exoskeleton, from concept to prototypes and eventually customer-site deployed beta units
• Architected and implemented robust fault-tolerant software for various custom PCBs responsible for joint control and actuation, power distribution, network monitoring, sensor data processing, and system diagnostics
• Collaborated closely with the Electrical Engineering team to ensure seamless integration between hardware design and software development cycles, including multiple iterations of "new board bring up" and hardware.
• Improved developer velocity by implementing CI/CD-driven development flow for all embedded software projects; leveraged automated unit testing and deployment, CI-connected hardware-in-the-loop fixtures, and device.
• Worked with executives and key technical stakeholders to develop a comprehensive robot threat model and security plan. Responsible for implementing high-assurance-boot and secure firmware update procedures for.

Hanover, New Hampshire, US

Embedded System Security

• Designed tightly-coupled FPGA hardware and software for use in network security appliances based on heterogeneous SoC architectures such as the Xilinx ZYNQ
• Developed embedded Linux images (Yocto), kernel drivers, and userspace libraries that enabled the integration of custom FPGA-based cryptographic IP cores into OpenSSL for use in hardening and accelerating OpenVPN

• Designed, prototyped, tested, documented, and deployed all embedded firmware for Avatech products (handheld snowpack analysis devices)
• Developed sensor processing algorithms for use in highly-constrained low-power connected devices
• Worked closely with contract manufacturers to quickly bring up, validate, and debug new hardware

Hanover, NH, US

• Run weekly electronics labs; work with professor to develop curriculum; run student office hours; grade homework and exams

Palo Alto, California, US

• Optimized layout and implementation of digital IP blocks, such as ARM CPU cores, for use on Broadcom SoCs
• Developed scripts and programs facilitating ASIC design flow; conducted logic synthesis, clock-tree synthesis, place and route, power optimization, and static timing analysis using ICC, EDI, and other back-end design.

Master Of Science (Msc), Computer Engineering

Bachelor Of Engineering (B.E.), Electrical And Electronics Engineering

Bachelor Of Arts (B.A.), Engineering Science