Brian Cline Email and Phone Number

I'm a digital hardware designer and researcher that has built a career in design+technology pathfinding and understanding how future semiconductor (and non-semiconductor) technologies will influence the way we build computing systems. I have extensive experience as a VLSI designer and physical designer, translating and co-optimizing between the system architecture, the processor micro-architecture, the physical design and implementation, all the way down to the technology fundamentals - the devices and the interconnects. The research team that I built and led at Arm for almost 10 years created a predictive technology modeling and system benchmarking flow that allowed us to look at a wide array of computing technologies ~5-10 years ahead of when they would be deployed in the industry. For example, my research team was the one the pioneered 3D-ICs at Arm. I have a wide exposure to design IP (from microcontrollers to high-performance mobile processors to servers) as well as future technologies like gate-all-around nanosheets, CFETs, eNVMs (e.g., MRAM), EUV Lithography, 2.xD/3D-ICs, etc., and my research has focused on how to co-optimize computing systems with those technologies.To be successful in such a diverse field, I have a broad set of skills from writing RTL to designing micro-architectural blocks to physical implementation (including both Synopsys DesignCompiler, ICC2, and FusionCompiler; as well as Cadence Genus and Innovus) to designing standard cell libraries. I also heavily rely on automation so I have extensive experience in scripting in a number of languages including TCL, Perl, and Python. I've also published ~60 papers (1800+ Citations, h-index of 21 as of March 2022) and have extensive experience patenting my IP, including over 30 filed inventions.Overall, I have a rich set of research and pathfinding experience, as well as a diverse set of soft skills, and I love exploring and finding new design and technology pathways for computing.