Brian Millar Email & Phone Number

25+ years of physical implementation and STA leadership of processors and SOCs, logic, circuit and system design of embedded processor peripherals and memories, and all aspects of design from specification through evaluation in labExpertise with leading teams on design methodology/implementation and flow development for ultra low power, high performance and power efficiency PPA goals.2 year international assignment as Design Team Leader in Toulouse France for 1st Motorola 3G mobile SOC.Highly enthusiastic, ability to learn quickly and excellent communication skills.Strong technical and project leader, comfortable leading international teams, received Samsung/UT Executive Management Training Certificate1 year of cross-functional training in test verification, applications and process engineering in wafer fab.Computer architecture and parallel processing emphasis in graduate study. Specialties: -Developing differentiating novel techniques for achieving 2.9GHz+ with lowest mW/MHz power efficiency- 32nm - 5nm FinFET Low Power Design, Implementation and Methodology- ARM processor integration - All aspects of design implementation (logical/physical synthesis, PnR, STA, noise, power, IR drop, spice, LVS/DRC etc...)- Project, Team and Technical leadership- Working with/Managing International Teams

Listed skills include Static Timing Analysis, Soc, Ic, Verilog, and 17 others.