Brian Wiseman Email & Phone Number

Gilbert, Arizona, United States

• Remote Reliability Analysis Engineer Contractor for JPL in Pasadena CA
• Electrical Parts Stress Analysis (EPSA): Analyzed the component stress for various space flight boards including DC, Digital, Synthesizer, Receive, TX, TRSW, and Power Amplifier.
• Worst Case Analysis (WCA): Analyzed the adherence to requirements under worst case conditions using JPL component de-ratings for the Receive, TX, TRSW, and Power Amplifier boards.
• Single Events Effects Analysis(SEEA): Analyzed the component and system effects under transient radiation, which is defined by the JPL parts group, for the Synthesizer, Power Amplifier Unit, and TX boards.
• Failure Modes, Effects, and Criticality Analysis(FMECA): Performed a review of board and system assemblies to evaluate tolerance functionality during test. Identified critical issues and proposed solutions that were.

Chandler, AZ

• Mobile RF Systems Engineer
• TX system lineup analysis which led to RF front-end component requirements, including Power- out, ACLR, SEM, Spectral Emissions, Noise, Current, and EVM in an Excel based VB tool.
• Designed and optimized envelope tracking and digital pre-distortion for Intel reference design to be used by external customers in evaluating performance of Intel’s ICs with RF front-end devices.
• Managed a team of engineers to help drive EMI-related customer issues down to zero for carrier compliance which resulted in a successful customer launch in Aug, 2018.
• Solved multiple transceiver emission violations and presented successful solutions to the customer to meet 3GPP EMI compliance.

Tempe, AZ

• Mobile Application Engineer
• Researched and presented to the technical staff the current PA and envelope tracking vendor offerings on a monthly basis.
• Authored multiple front-end spec requirements for use in Fujitsu’s reference design.
• Worked with multiple customers (RIM, Motorola, Sequans) analyzing their RF front-end selections in Excel-based lineup tool to illustrate the success in working with Fujitsu’s chip set.
• Designed a structured method to test vendor envelope tracking ICs. Constructed Matlab scripts to automate testing and optimized parameters of envelope tracking ICs. This enabled Fujitsu to determine which ICs were.
• Designed, simulated with spice, and executed a PCB layout of an analog (100MHz BW) envelop tracking amplifier lineup using state-of-the-art high frequency op amps/discrete FETs.

• Wireless Base Station Design
• TX, Feed-forward, and DPD Lineup analysis and simulation for CDMA, Wimax, and LTE communication systems using ADS, Matlab, Crystal Ball, and Excel
• Developed requirements, certification test plans, for both board and system level CDMA, WIMAX, and LTE products
• Championed RF design teams to pass Six Sigma adherence for both laboratory and factory data results using Minitab
• Technical lead for system integration on Wimax and LTE remote radio head projects
• Designed, simulated and developed the hardware/software requirements for TX AGC systems for CDMA, Wimax and LTE products

• Communication Satellite Design
• Designed, simulated, and tested a 14GHz Peltier Cooled RX Low Noise Amplifier using a crystal substrate with less than 1dB Noise Figure
• Designed, simulated, and tested a 300MHz PLL with a discrete VCO
• Performed worst case analysis for several circuit level designs