Senior Design Engineer
Current
Dec 2014 - Present
AeroLeads people directory · profile
Brian Holscher Email & Phone Number
Senior Design Engineer
at
Northwest Logic
1 work email found
@nwlogic.com
2 phones found area 503
LinkedIn matched
✓ Verified May 2026
4 data sources
Profile completeness 100%
Current company
Role
Senior Design Engineer
Location
Hillsboro, Oregon, United States
Who is Brian Holscher? Overview
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Quick answer
Brian Holscher is listed as Senior Design Engineer at Northwest Logic, based in Hillsboro, Oregon, United States. AeroLeads shows a work email signal at nwlogic.com, phone signal with area code 503, and a matched LinkedIn profile for Brian Holscher.
Brian Holscher previously worked as Team Leader, Implementation at Pmc-Sierra and Principal Engineer at Nethra Imaging. Brian Holscher holds Msee, Computer Engineering from Portland State University.
Company email context
Email format at Northwest Logic
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{first_initial}{last}@nwlogic.com
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AeroLeads found 1 current-domain work email signal for Brian Holscher. Compare company email patterns before reaching out.
Profile bio
About Brian Holscher
Experienced Team Leader in chip implementation. Expert microprocessor architect and logic designer. Expertise in cache design and cache prefetcher design. Heavy experience in synthesis, static timing analysis, and low power design.Specialties: * RTL design* Microprocessor architecture* Synthesis of high speed and low power designs* Cache design* Cache prefetcher design* Verilog and SystemVerilog* DFT* RTL emulation using FPGA systems.* CLP and CPF
Listed skills include Verilog, Rtl Design, Asic, Soc, and 19 others.
Current workplace
Brian Holscher's current company
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7 roles · 35 years
Brian Holscher work experience
A career timeline built from the work history available for this profile.
Team Leader, Implementation
Team lead role (mentoring, leadership, and training) for 7 engineers.Implementation project manager for 65 million gate SOC in 28nm. * Managed schedules and deliverables for cross site teams in Canada and IndiaChip lead for 12 million gate 40nm ASIC for the printer market * Designed chip pad ring. Worked with customer to optimize pad ring and PCB.
Sep 2011 - Nov 2014
Principal Engineer
Nethra Imaging
* Lead architect and logic designer for massively parallel multi-core processor arrays acquired from Ambric Corporation. * Logic designer of CABAC block for 65nm H.264 Encoder
May 2009 - Aug 2011
Hardware Engineer
* Architecture and logic design of L2 like RAM/cache block for Ambric's next generation of massively parallel processor arrays on 65nm. Design included a 2-way set associate synthesizable cache.* Architecture and logic redesign of RAM block for Ambric's next generation of massively parallel processor arrays on 65nm. Design includes several FIFO and RAM.
May 2007 - Nov 2008
Principal Engineer
* Architecture and logic design of L2 data prefetcher unit. Design based upon my patented original design.* Architecture and logic design of an upgraded Alias Hardware unit. Received patent on the architecture design.* Architecture and logic design of Victim Cache unit. Design was a major redesign for improved features and frequency.* Investigated and.
Jul 2003 - Feb 2007
Senior Digitial Design Engineer
Accelerant Networks
* Architecture and logic design on a 6.5 GB 4 channel PAM4 transceiver. * Designed a 16-bit 311Mhz microprocessor for handling configuration. * Designed and implemented control register bus, MDIO, and JTAG interfaces.* Managed validation effort including tests, coverage, and regressions.
Jan 2002 - Mar 2003
Hardware Engineer
* Logic design on Prescott Pentium® 4 project. Reponsible for RTL design of Address Generator Unit and for support logic for the Integer Register File.* Architecture and logic design on Tualatin Pentium® III project. Design lead for Data Prefetcher Unit. Implemented extensive redesign for critical cache speed paths and conducted Data Prefeetcher.
1991 - 2002
~11 yrs
2 education records
Brian Holscher education
Msee, Computer Engineering
Portland State University
Bsee, Computer Engineering
Portland State University
FAQ
Frequently asked questions about Brian Holscher
Quick answers generated from the profile data available on this page.
What company does Brian Holscher work for?
Brian Holscher works for Northwest Logic.
What is Brian Holscher's role at Northwest Logic?
Brian Holscher is listed as Senior Design Engineer at Northwest Logic.
What is Brian Holscher's email address?
AeroLeads has found 1 work email signal at @nwlogic.com for Brian Holscher at Northwest Logic.
What is Brian Holscher's phone number?
AeroLeads has found 2 phone signal(s) with area code 503 for Brian Holscher at Northwest Logic.
Where is Brian Holscher based?
Brian Holscher is based in Hillsboro, Oregon, United States while working with Northwest Logic.
What companies has Brian Holscher worked for?
Brian Holscher has worked for Northwest Logic, Pmc-Sierra, Nethra Imaging, Ambric, and Transmeta.
How can I contact Brian Holscher?
You can use AeroLeads to view verified contact signals for Brian Holscher at Northwest Logic, including work email, phone, and LinkedIn data when available.
What schools did Brian Holscher attend?
Brian Holscher holds Msee, Computer Engineering from Portland State University.
What skills is Brian Holscher known for?
Brian Holscher is listed with skills including Verilog, Rtl Design, Asic, Soc, Fpga, Microprocessors, Systemverilog, and Logic Design.
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