Brian B. Arceneaux

Brian B. Arceneaux Email and Phone Number

Principle Engineer (Software| Machine Learning, Data, Ops) (Hardware| Storage - Memory, Semiconductors, Material Science) Productization, Design of Experiments, Research, PhD @ Western Digital
Brian B. Arceneaux's Location
San Francisco Bay Area, United States, United States
Brian B. Arceneaux's Contact Details

Brian B. Arceneaux personal email

About Brian B. Arceneaux

With over 10 years of experience spanning software development and nanotechnology research, I bring a robust background in designing experiments across both software and hardware domains, including semiconductor research, ReRAM, neuromorphic computing, machine learning, and distributed computing systems.At Western Digital, my current focus is on pioneering machine learning applications and robust data pipelines that bolster our container-as-a-service and VM offerings. In collaboration with my team, we’ve advanced our technological capabilities by optimizing ETL processes and developing sophisticated toolsets for data analysis. Our current initiative involves semi-supervised learning models that are set to revolutionize the way we approach complex data challenges.Leveraging a combination of Kubernetes, Python, and CI/CD, among other technologies, we’ve been able to enhance operational efficiency and drive innovation. My mission is to continue harnessing the power of AI to not only refine our product offerings but also to contribute to cutting-edge scientific research, ensuring Western Digital remains at the forefront of the storage solution industry.

Brian B. Arceneaux's Current Company Details
Western Digital

Western Digital

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Principle Engineer (Software| Machine Learning, Data, Ops) (Hardware| Storage - Memory, Semiconductors, Material Science) Productization, Design of Experiments, Research, PhD
Brian B. Arceneaux Work Experience Details
  • Western Digital
    Principal Engineer
    Western Digital Apr 2019 - Present
    San Jose, Ca, Us
    Projects as Principle Engineer, Software Development (Apps)Current Projects: SV Calibration Data project, which leverages machine learning to continuously improve model performance while detecting anomalies. Key highlights of the project include: Initial Proof of Concept: Implemented supervised learning using a 1D Convolutional Neural Network (CNN) to establish the foundation. Current Model Overview: Developed and maintained a detailed overview of the latest model version in PoC, MVP and production. Phase 1: Designed a Transfer Learning Pipeline to enable continuous retraining and anomaly detection, adapting the model to evolving data. Phase 2: Built a hybrid Semi-Supervised/Transfer Learning Pipeline to further enhance model performance and anomaly handling.Older projects: Led the zero-to-pilot implementation of an on-premises hybrid cloud solution for testing APIs before moving to Google Kubernetes Engine (GKE). This served as an R&D testing cluster for data engineering pipelines, Infrastructure as Code (Linux), CI/CD, and ML DevOps in a Kubernetes environment.Developed the DAO Horizon SIEVE, an automated paper screening app for the Horizon platform used on the manufacturing HDD floor in Thailand. This project utilized Kafka for real-time data streaming and automated user queries.Tech Lead and Project Leader for GalaXY – Guided Data Discovery Platform Development, scaling MVP1 to support over 100 users, mentoring team members, and optimizing the web application layer to achieve a 10x speed improvement.
  • Western Digital
    Staff Engineer
    Western Digital Sep 2017 - Apr 2019
    San Jose, Ca, Us
    Project Lead: GalaXY – Guided Data Discovery Platform Development – MVP1 o Tech Lead Engineer: Main roles included system design, web application coding to help build a scalable Dockerized microservice framework. This internally-built custom-web-application allows for UI (React) and API (curl) access to our internal big data platform. Typical Use Case: Large raw data wrangling and extraction (5x faster vs python-Redshift direct data extraction), and bulk data extraction for machine/deep learning workloads.o Experience Gained: web and app frameworks built from scratch (Flask, React, and Token LDAP login). Limited API design experience for this project Project Owner: Near- Real Time Kafka, Spark-Streaming based Distributed Pipeline and Dashboard Dev.o Tech Lead: Main roles included: ETL analytics system design, noSQL database schema design, and UI layout creation. This project was my innovation, project taken from zero to pilot; presented at internal conference . This platform-agnostic compute solution was built on-top of the Hadoop ecosystem; Used in qualification production testing, provided a near-real-time standardized data-visibility tool for our engineers. (Submitted for patent: Trade Secret accepted)o Experience gained: Kafka, Spark, MongoDB, front-end callback functionsDeveloped Integration Stand-Alone App. - Processing of Structured and Unstructured Data o Data Analytics and Software Development Experience: Python-Tinker based UI which enabled flexible summary file generation. Filled a gap for testing-engineers’ day-to-day-productivity: project was my innovation. It utilized parallel processing methods to summarizing 100's of GB of raw files, while given the user flexibility. It was deployed to the data center reliability team, and later adopted as part of the day-to-day reliability production process flow.
  • Western Digital
    Sr. Engineer
    Western Digital Mar 2016 - Sep 2017
    San Jose, Ca, Us
    o C-code Optimization: Developed a parallel-bit-testing algorithm in C-code for the in-house SanDisk (ReRAM) Test Vehicle, code was accepted for production-usage and reduced testing time by 20%o Statistical Testing / Circuit Simulations: CMOS Evaluation Study (CMOS TEG array + ReRAM cell). Developed the experimental design, characterized the voltage drop across each component of the CMOS TEG array + ReRAM cell with KVL calculations (H-Spice simulations); confirmed with measured lab tested data; presented data to internal customer: resulted in pin-pointing the hot spot (point of high current leakage in the overall circuit design).
  • Besstech (Battery Energy Storage Systems - Technologies) Llc
    Co-Founder
    Besstech (Battery Energy Storage Systems - Technologies) Llc Feb 2012 - Jan 2019
    New York, Ny, Us
  • Besstech (Battery Energy Storage Systems - Technologies) Llc
    (Acting) Ceo, Coo
    Besstech (Battery Energy Storage Systems - Technologies) Llc Apr 2011 - Aug 2013
    New York, Ny, Us
    Pitched the first initial idea to upstate NY and NYC investors. Won first place in Albany Business plan competition.
  • Cypress Semiconductor Corporation
    Technical Development Engineer, Staff
    Cypress Semiconductor Corporation Jul 2014 - Apr 2016
    San Jose, Ca, Us
    Data Analytics, and Visualization (Volatile memory (SRAM, I/O Periphery FETS)) Technical Development Engineer, Staff - Developed binary search algorithm for transistor voltage-threshold calculation: Revived a thought-to-be-broken automatic wafer-test-machine; increased reliability testing productivity 100x (previous testing done manually before this innovation). - Developed MOSFET I/O periphery SPICE models: Gained experience with building complex circuit models.
  • Intermolecular
    Device Engr
    Intermolecular Aug 2013 - Jul 2014
    San Jose, Ca, Us
    Device Engr. NCG Researcher - Resistive RAM materials research (2 Patents accepted)
  • Cnse
    Graduated Phd Nanoscale Engineering, Material Science, Software Simulations
    Cnse Jan 2011 - Aug 2013
    Albany, N.Y., Us
    Graduated in summer 2013.Dissertation title: Controlling the variability of hafnium oxide based non volatile resistive memory via the modeling of the switching process
  • Cnse
    Research Assistant
    Cnse Aug 2009 - Aug 2013
    Albany, N.Y., Us
    Electrical Characterization of ReRAM materials and crossbar,1T1R and array strucutres
  • Sematech
    Contractor (Intern)
    Sematech 2010 - Aug 2013
    Albany, Ny, Us
    Memory Technologist 1T1R fabricationReRAM Reliability Materials/Electrical characterization of ReRAM XbarReRAM (Modeling Forming and Switching Phenomena via comsol and matlab)
  • Bess-Technologies
    Co-Founder
    Bess-Technologies 2010 - Jan 2012
    www.bess-tech.com Acting-CEO (2010-11)Co-founderEnergy Technologist
  • Louisiana Tech University
    Applied Physics Masters
    Louisiana Tech University Aug 2006 - Aug 2008
    Ruston, La, Us
    Applied Physics
  • Baker Hughes Inteq
    Mwd/Lwd Engineer
    Baker Hughes Inteq Jan 2005 - Jul 2006
    Houston, Texas, Us
    I was a field engineer, responsible for running and troubleshooting down-hole measurement DSP based equipment

Brian B. Arceneaux Skills

Characterization Physics Nanotechnology Matlab R&d Semiconductors Simulations Design Of Experiments Electronics Cmos Thin Films C++ Materials Science Scanning Electron Microscopy Failure Analysis Mems Comsol Afm Spectroscopy Electrical Engineering Entrepreneurship Labview Sensors Lithography Device Physics Monte Carlo Simulation Start Ups Jmp Spice Optics Testing Engineering Python Semiconductor Industry Research And Development Python

Brian B. Arceneaux Education Details

  • University At Albany
    University At Albany
    Nanotechnology / Semiconductor Materials / Economics/ Buiness Plan Writting
  • Louisiana Tech University
    Louisiana Tech University
    Applied Physics
  • University Of Louisiana At Lafayette
    University Of Louisiana At Lafayette
    Electrical /Computer Engr.
  • Interview Kickstart
    Interview Kickstart
    Api Design
  • Coursera
    Coursera
    Data Science
  • Coursera
    Coursera
    Data Science
  • Udemy
    Udemy
    Data Science

Frequently Asked Questions about Brian B. Arceneaux

What company does Brian B. Arceneaux work for?

Brian B. Arceneaux works for Western Digital

What is Brian B. Arceneaux's role at the current company?

Brian B. Arceneaux's current role is Principle Engineer (Software| Machine Learning, Data, Ops) (Hardware| Storage - Memory, Semiconductors, Material Science) Productization, Design of Experiments, Research, PhD.

What is Brian B. Arceneaux's email address?

Brian B. Arceneaux's email address is bb****@****any.edu

What schools did Brian B. Arceneaux attend?

Brian B. Arceneaux attended University At Albany, Louisiana Tech University, University Of Louisiana At Lafayette, Interview Kickstart, Coursera, Coursera, Udemy.

What are some of Brian B. Arceneaux's interests?

Brian B. Arceneaux has interest in Additude, Bernie Sanders, Goodful, Mit Technology Review, Inc, Community, Arts And Entertainment, Just Go Vacation, San Francisco Symphony, Gaia.

What skills is Brian B. Arceneaux known for?

Brian B. Arceneaux has skills like Characterization, Physics, Nanotechnology, Matlab, R&d, Semiconductors, Simulations, Design Of Experiments, Electronics, Cmos, Thin Films, C++.

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