Board MemberConcept DevelopmentBusiness DevelopmentJava ProgrammingSQL Database Design

Responsibilities and Tasks:My job is to develop efficient RF circuits and algorithms that optimize performance, size, cost and power consumption for a multi-mode and multi-band cellular platform within aggressive time limits.Systems:GSM, EDGE, WCDMA, HSPARF System Budget:Cascaded receiver NF, IP2, IP3, Compression, Desensitization, AGC and spurious calculation and optimizationCascaded transmit output power, noise, ACPR and spurious calculation and optimizationMixed Signal Algorithm Optimization:DC offset compensation, blocking interferer reduction and Automatic Gain Control algorithm optimizationCircuit Design:RF front-end module specification, schematic capture (Cadence), PCB layout (Cadence), differential LNA matching, spurious reductionSimulation:Electromagnetic PCB simulation for differential LNA matching (Momentum), circuit simulation (ADS), MATLAB, Smith-Chart simulation tools and RF lineup analysis (SystemVue and MS Excel)Debugging and Measurements: All specified 3GPP RF test cases and inter Radio Access Technology handoverTest System Development:Python code development, GPIB controlCoaching:Provide guidance and training for more junior engineers

Responsibilities and Tasks:My job was to develop efficient RF circuits and algorithms to optimize performance, size, cost and power consumption for dual-mode and multi-band cellular platforms in cooperation with an external customer. In parallel with project responsibilities I was leading an engineering team responsible for continuously developing automated RF test systems. During my leadership we were able to significantly shorten overall test time, enhance reliability and efficiency at the same time as we added a significant number of new test cases.Systems:GSM, EDGE, WCDMA, HSPARF System Budget:Cascaded receiver NF, IP2, IP3, Compression, Desensitization, AGC, spurious calculation and optimizationMixed Signal Algorithm Optimization: DC offset compensation, blocking interferer reduction and Automatic Gain Control algorithm optimizationCircuit Design:RF front-end module specification, schematic capture (Cadence), PCB layout (Cadence and Mentor Graphics), differential LNA matching, spurious reduction, reference oscillator crystal specificationSimulation:Circuit simulation (ADS), MATLAB, Smith-Chart simulation tools and RF lineup analysis (MS Excel)Debugging and Measurements:All specified 2G and 3G 3GPP RF test casesTest System Development:Manage team, facilitate motivation and innovation in the team, project planning, coordination of tasks and responsibilities, guidance and coaching of team-membersCoaching:Provide guidance and training for more junior engineers

Responsibilities and Tasks:At Thrane & Thrane my responsibilities included specification, design, simulation and test of RF circuits for terminals to be used with the BGAN satellite communication system. I successfully designed synthesizer circuits (VCO, fractional-PLL and loop filters) for ‘Explorer500’ which wasthe first Thrane and Thrane developed BGAN satellite terminal.System:Broadband Global Area Network (BGAN)PLL and VCO Design and measurements:Gain and phase margin, lock time, phase noise, pulling range, reference and fractional spuriousresponsesCircuit Design:VHF VCO design, fixed frequency integer PLL design, fractional PLL design, schematic capture (Orcad), PCB layout (Orcad)Simulation:Circuit simulation (APLAC), Smith-Chart simulation tools, PLL performance simulation (SimPLL and MATLAB)PCB Design:My tasks included responsibility and leadership for the PCB (Printed Circuit Board) design process for the Explorer500 product which except from BGAN functionality also included USB, 2-wire, Ethernet, Bluetooth and GPS systems

Responsibilities and Tasks:At Microcell my main responsibility was to lead a design team consisting of 5 experienced RF engineers during 2 successful projects. The team’s task in both projects was to design RF platforms for dual frequency band GSM/GPRS cellular phones. In parallel to my team lead responsibilities I was responsible for designing receiver circuits for the same two projects.Team Management:Team motivation, project planning, coordination of tasks and responsibilities, guidance and coaching of team-members and acting as interface to other technical and project groupsSystems:GSM, GPRS, FM RadioCircuit Design:RF front-end module specification, schematic capture, PCB layout, LNA matching, spurious reductionSimulation:Circuit simulation (APLAC), Smith-Chart simulation tools, receiver lineup simulation (MS Excel)Debugging and Measurements:All GSM and GPRS RX test cases, receiver block testing and debugging

Responsibilities and Tasks:I was responsible for designing VCO and PLL circuits for a GPRS dual frequency band handset (Nokia 3510) for high volume production. In parallel to project work I investigated potential future RF architectures as member of the RF Architecture group. The responsibility of this group was to analyze the market and specify the best solution currently available when considering RF performance, limited board space, cost budget and current consumption requirements.Systems:GSM, GPRS, EDGEPLL and VCO Design and Debugging:Loop filter design and optimization, PLL lock time optimization, reference spurious reduction, resolving issues related to 4GHz VCO resonant circuit yielding limited frequency coverageCircuit Design:Integer PLL design and optimization, 4GHz VCO characterization, schematic capture (Mentor Graphics), PCB layout design for the entire Nokia 3510 (Mentor Graphics)Simulation:Circuit simulation (APLAC), Smith-Chart simulation tools, PLL performance simulation (SimPLL, APLAC and MATLAB)

Responsibilities and Tasks:As RF Team Leader my job was to lead a team of 15 RF engineers to develop receiver, transmitter and synthesizer circuits required for dual frequency band handsets for volume production for the U. S. and Korean cellular markets. This involved specification, design, simulation and testing of active and passive circuits necessary to meet the IS-95 and J-STD-018 CDMA cellular standards in a product with tight board space, time and cost constraints. In parallel to team lead responsibilities I was responsible for receiver circuit design.Team Management:Team motivation, project planning, coordination of tasks and responsibilities, guidance and coaching of team-members and acting as interface to other technical and project groupsSystems:IS-95, J-STD-18 CDMA StandardsRF System Budget:Cascaded super heterodyne receiver NF, IP2, IP3, AGC, spurious calculation and optimizationCircuit Design:RF front-end module specification, LNA design, LNA matching, IF amplifier design, SAW filter matching, schematic capture (Mentor Graphics), PCB layout (Mentor Graphics), spurious reductionSimulation: Circuit simulation (APLAC), Smith-Chart simulation tools and RF lineup analysis (MS Excel)Debugging and Measurements:All specified IS-95 and J-STD-18 receiver test cases, single tone desensitization performance due to transmit cross modulation, half duplex spurious response and half IF spurious response issues

Responsibilities and Tasks:I worked with RF circuit verification, debugging and performance testing for Nokia’s first GSM cellular phone designed specifically for car installation. In parallel to circuit design responsibilities I developed the first automated RF test system to be used at Nokia Copenhagen. This work included SW programming as well as building the physical test system including a control PC and the necessary RF test equipment.System:GSMCircuit Design:LNA matching, IF SAW filter matching, schematic capture (Mentor Graphics), PCB layout (Mentor Graphics)Simulation:Circuit simulation (APLAC)Debugging and Measurements:All specified GSM test cases, block level testing for receiver, transmitter and synthesizer circuitsTest System Development:Programming automated RF test SW (Pascal compiler, GPIB control), designing and building test setup