Bryan Ramirez Email & Phone Number

Windsor, CO, US

Plano, Texas, US

Established and manage the Industries, Solutions and Ecosystems organization across the Siemens EDA IC verification business unit with the objective of identify key growth opportunities and driving innovate and differentiated solutions in strategic vertical markets (autonomous mobility, datacenter/HPC and aerospace & defense) and horizontal solution areas.

Wilsonville, OR, US

Product Manager responsible for driving the business and associated products for the FPGA and functional safety markets. Responsible for the initiating the business unit's entry into the automotive functional safety market for ISO 26262.

Fremont, CA, US

Led and managed a multi-disciplined engineering team including design, verification, firmware and physical implementation developing IP and emulation/prototyping platforms for Enterprise SAS SSD’s:- Responsible for and supporting development of compression, encryption, PCIe application layer, flash channel and flash data path / virtualization IP blocks..

Led and managed a multi-disciplinary hardware engineering organization in a fast-paced semiconductor start-up working closely with the software organization developing HPC and acceleration products integrating processing, networking, memory, and storage capturing all data coherently to be universally accessible to every application at hardware cache-memory.

Non-profit, member controlled organization responsible for directing the future development and driving adoption of RapidIO:- Interop Task Group Chair responsible for leading numerous RapdiIO Trade Association member companies in the development of the RapidIO Gen2 Interop Checklist. Redefined approach for better integration with modern verification.

San Jose, CA, US

Self-driven, evolving role with continuously increasing technical and leadership responsibilities for development of critical Xilinx FPGA IP including Serial RapidIO (SRIO), QDR-II+, QPI, and PCIe IP:- Managed projects and engineers responsible for the entire IP development lifecycle- Verification lead for the Xilinx 20nm PCIe Gen3 hard block with a team.

San Jose, CA, US

Factory facing applications role supporting FPGA 1G Ethernet, 10G Ethernet, and XAUI IP responsible for handling technical escalations from internal applications groups and top-tier customers; creating and maintaining customer facing documentation and collateral; collaborating with engineering and marketing to ensure customer focus; and training and.

San Jose, CA, US

Customer facing applications role responsible for supporting customers across the entire breadth of Xilinx solutions including all FPGA architectures, software, IP, design, synthesis, implementation, timing closure, hardware, verification and debug. Supported worldwide customer applications organization with specializations in high speed serial protocol.

Responsible for all facets of a joint farming operation including leasing land, financial management, equipment acquisition and maintenance, irrigation, planting, harvesting and other agronomics associated with growing corn and alfalfa. Also, managed a heard of 20 cattle.