Byron M.

Byron M. Email and Phone Number

Analog IC Design Engineer
Byron M.'s Location
San Diego, California, United States, United States
About Byron M.

I am an electrical engineer with knowledge of software, hardware, and Analog/RF IC design. My skills include schematic design, layout, simulation, and testing of analog / RF circuits at both the board level and transistor level. I also possess a solid background and experience in digital design, RTL design, VHDL, and verilog modeling. My hands-on experience includes troubleshooting circuits using network, logic, and spectrum analyzers, oscilloscopes, signal generators, and other common lab equipment. My portfolio is complemented with my excellent communication and interpersonal skills.

Byron M.'s Current Company Details

Analog IC Design Engineer
Byron M. Work Experience Details
  • Qualcomm
    Senior Engineer
    Qualcomm Sep 2018 - Feb 2024
    San Diego, California, United States
    Innovated, analyzed, and improved analog circuits on the Analog / Mixed Signal IP team for various projects. Projects include the following:Ultrasonic Fingerprint Sensor: Responsible for implementing a 30V charge pump for the fingerprint sensor used in Qualcomm's ultrasonic fingerprint sensors, and chip bring-up. Other tasks includ designing a 5-stage differential oscillator with programmable frequency and phase, Anti-Aliasing filters, documentation, and LDO's.Base-band receiver ADC: Responsible for the design of various blocks including Time-to-Digital Quantizer, SAR Logic, LDO's, band-gaps, Op-Amps, Reference generators, Clock Receiver and Synchronizers, signal attenuators, Common-Mode bias voltage generators, and level shifters.Oversaw the layout design and ran resistance + capacitance + IR characterization tools to find weaknesses in power grid and signal routing as well as to reduce parasitic coupling from aggressors.Designs were taped out in several process nodes including 20nm, 7nm, and 5 nm.
  • Qualcomm
    Engineer
    Qualcomm Sep 2016 - Sep 2018
    Greater San Diego Area
    Responsible for the design and ownership of an analog power mux which is distributed across the SOC or CPU subsystems. Ownership involved generating all deliverable files to adjacent teams, scheduling deliverables to meet milestones, running design reviews, identifying and implementing all design changes and improvements, and innovating new ideas- including a novel super low-area and power consumption supply comparator. Designs included bias circuits, current mirrors, operational amplifiers, low-resistance head switches, level shifters, comparators, and miscellaneous custom digital logic.Successfully patented 3 novel designs or methodologiesParticipated in a test chip design as a project owner for a power multiplexor / regulator. Tasks included generating all front end files, run place and route, perform all analog design singlehandedly, and oversee layout designers. the design on the test chip had no functional issues and worked as intended. Design components included regulators, current mirrors, LDO's, OP-AMPs, bias generators, comparators, and head switches.Created Linux shell scripts and Verilog-A models to automate tasks and increase work efficiency.- Designs were taped out in several process nodes: 14nm, 11nm, 10nm, 7nm, 5nm with TSMC and/or SEC foundries.
  • Hardy Process Solutions
    Senior Hardware Design Engineer
    Hardy Process Solutions Sep 2011 - Sep 2016
    Greater San Diego Area
    Responsible for the research, design, development, documentation, and release of various weigh-scale instruments. These instruments use strain gauge load-cells and ADCs to accurately measure weight. The ADC signal is processed using digital signal processing techniques and then displayed using a human-machine interface (HMI) with the option of various serial communications protocols. Key Contributions:- Design the board-level schematic, oversee the PCB layout, and perform prototype testing for low-power weight measurement instruments. Additional responsibilities include designing to pass electrostatic discharge (ESD) and electromagnetic interference (EMI) tests, as required by Underwriters Laboratories (UL) certification requirements.- Design and develop various solutions for FPGAs, micro-controllers, and programmable logic controllers using the verilog hardware design language, C/C++, and proprietary languages. These solutions include capturing, analyzing, and processing both analog and digital signals.- Utilize digital processing techniques in verilog and analog circuitry to meet strict design specifications such as low-power and accuracy requirements- Use the IEEE 1149.1 (JTAG) and background debug mode (BDM) interface to debug and program various micro controllers- Create and maintain documentation such as Engineering Change Notices (ECNs), Requests for Improvement (RFI), hardware design documents, high level design documents, test plans, design presentations, and check lists
  • Iq Analog
    Software Engineer
    Iq Analog Dec 2008 - Sep 2013
    Greater San Diego Area
    Responsible for the design and development of software used in the simulation and analysis of data converters to be used in applications such as wireless communications. Also responsible for the design and development of GUI applications used to configure and control the on-board circuitry of prototyping boards.Key Contributions:- Created cross-platform graphical user interfaces which interface with a development board using several serial communications protocols to allow users to control a variety of devices under test. Some of these devices consist of ADCs, DACs, and FPGAs- Wrote algorithms to generate a model of ADC signals given the following characteristics: number of bits, gain error, offset error, phase error, jitter, tones, dither bits, harmonic distortion, and amplitude- Created a graphical signal analyzer to analyze and display signal characteristics from modeled and real ADC signals, such as frequency, amplitude, INL, DNL, SNR, SFDR, ENOB, and SINAD

Byron M. Education Details

Frequently Asked Questions about Byron M.

What is Byron M.'s role at the current company?

Byron M.'s current role is Analog IC Design Engineer.

What schools did Byron M. attend?

Byron M. attended Lund University, San Diego State University.

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