Lead architect and lead hardware design engineer for five generations of high reliability and high availability embedded server blades.---------------------------------------------------In this role I write architecture requirements, define cost, staffing and schedule estimates, execute performance and reliability analyses, lead the design effort, full qualification, and field introduction of new systems. I present proposals to senior leadership and support the project approval process. I am responsible for meeting all electrical, thermal, signal integrity, power consumption, regulatory, and physical requirements. Responsible for component selection and qualification including processors, chipsets, storage media, and memory. Design work includes signal integrity simulations, routing guidelines, board stack-up definition, PCB technology specifications, power regulator design, writing VHDL code for CPLDs, and initial hardware bring-up. I define and execute design verification testing (DVT). Work with software development and testing organizations during the design, integration, qualification and manufacturing process. Responsible for sustaining engineering and field support activities. Designs include Intel processors, embedded microcontrollers, Ethernet interfaces, USB, DDR1/2 memory, PCI busses, PCIe, and other high speed interfaces.Hardware architecture and design for Avaya’s gateways and auto-dialer system.------------------------------------------------------------------------------------------------------------------In this role I have been responsible for multiple circuit board designs. I worked on the architecture and design of a new circuit board to add Voice-over-IP capabilities (VoIP) to Avaya’s auto-dialer and gateway systems. The designs include PowerQUICC processors, large FPGAs, soft processors and multi-core DSPs. I am also responsible for cost reduction activities and sustaining engineering for these systems.

Lead software develper for multiple telecommunication projects mainly in the area of cross-connect systems. Here are descriptions of the main projects I worked on.1) Developed performance monitoring software and firmware for the 2.5 Gbps and 10 Gbps interface units of a SONET/SDH broadband system. The development required object oriented C++ design, ChorusOS, and Rational Rose modeling. 2) Responsible for the integration of all application and embedded software features, as well as their integration with a brand new hardware platform. Lead the hardware-software integration effort. Coordinated multiple integration test plans, schedules, and resources for the timely completion of all hardware-software integration testing.3) Performed overall feature planning, development, and testing for a DS3 interface and for the Test Management subsystem. Wrote design documents and implemented software diagnostics for several circuit boards of the fiber-optic cross-connect system.

Application software development for the first and second generations of Network Control Point systems. Worked on the design and implementation of different real-time software features including 800 number call processing and data collection. Worked with C/C++, object oriented design, Unix, and performance analysis tools.

Product design engineer for electrical components.------------------------------------------------------------------------Responsible for product specifications, design planning, testing, and approval of different electrical and mechanical components of the 1990 and 1991 Cavalier, and the 1991 Blazer models. Also responsible for current engineering of a number electrical and mechanical componentes for several Chevrolet 1988 and 1989 models.