Casey Mcmullen Email & Phone Number
@aeye.ai
1 phone found area 650
LinkedIn matched
Who is Casey Mcmullen? Overview
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Casey Mcmullen is listed as Manager of FPGA Firmware Design at AEye, Inc., based in San Leandro, California, United States. AeroLeads shows a work email signal at aeye.ai, phone signal with area code 650, and a matched LinkedIn profile for Casey Mcmullen.
Casey Mcmullen previously worked as Sr. FPGA Design Engineer at Aeye, Inc. and Logic Design Engineer (contract) at Revolutionice, Inc.. Casey Mcmullen holds Bs, Electrical Engineering from Drexel University.
Email format at AEye, Inc.
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AeroLeads found 1 current-domain work email signal for Casey Mcmullen. Compare company email patterns before reaching out.
About Casey Mcmullen
Digital Logic Design Engineer with more than 20 years of experience focused on ASIC/FPGA SoC and embedded systems, video, graphics and digital image capture/processing, data acquisition and automated testing support. Dedicated to a verification-centric design flow for high quality results delivered on schedule. Comfortable working on mixed signal designs, experienced at interfacing with analog engineering to achieve success. Always interested in automating design tasks with scripting and tool flow customization for repeatability and efficiency. Track record of leading small teams of varied experience levels.Languages: Verilog, VHDL, some System Verilog/UVM, Perl, C/C++, Visual BasicTools: VCS, Incisive, ModelSim, Lint, CDC, Spyglass, Design Compiler, Primetime, Xilinx ISE/Vivado, Excel, MS Office, Unix/Linux, NI DAQ, LabView, MATLABStandards: AMBA, SPI, I2C, LVDS, MIPI, Gb Ethernet, SerDes
Casey Mcmullen's current company
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Casey Mcmullen work experience
A career timeline built from the work history available for this profile.
Sr. Fpga Design Engineer
Logic Design Engineer (Contract)
* Architected and Implemented FPGA SoC to control autonomous commercial construction robot for startup.* Used Xilinx Zynq-7000 MicroZed on IO carrier card with Pmod and custom devices.* Developed custom control logic for PWM servo/motor control, rotary shaft encoder, 2D LiDAR capture/filtering, wireless remote control IF, etc.* Implemented Xilinx IP blocks for SPI, UART IF; AXI, APB bus/slaves; GPIO and user IF.* Interfaced with Gyro, Accelerometer, Magnetometer as IMU with software sensor fusion; Hokuyo/Garmin LiDAR rangefinders for mapping.* Developed baremetal Firmware and drivers for ARM Cortex-A9, interrupt and event timer driven in C/C++. Assisted Software team with developing robot control application Software. Generated customized PetaLinux/Ubuntu Linux kernels for dual ARM.* Tuned PID control loops for various drive/control brushed and BLDC motors.* Generated full wiring specification for robot chassis.
International Family Travel Experience - Sailboat Voyaging
https://sailingmcmullens.wordpress.com/
Digital Design Engineer
Digital Design Manager/Engineer
* Designed/Implemented CMOS image sensor ASICs and sensor control/image processing FPGAs for Research and Development, pre-production prototypes.* Worked closely with Japanese engineers and Japanese language documentation, on-site and internationally.* Brought designs through initial planning, specification, RTL coding, automated verification, design quality checks, synthesis and documentation for initial timing closure.* Managed several projects (teams of 4-6) with a focus on coordinating with international teams and delivering on schedule.
Sr. Vlsi Design Engineer
* Designed/Implemented CMOS image sensors, image processing embedded SoC ASICs for cutting edge products and sensor control/image processing FPGAs for prototyping.* Performed in a fast moving, high risk startup environment to create new High Dynamic Range imaging solutions for the security/surveillance markets.* Brought designs from initial planning, specification, RTL coding, IP integration, automated verification, design quality checks, synthesis and documentation, bringup and first silicon evaluation using Oscilloscopes, Logic Analyzers, etc.* Developed modules for image processing with kernel based digital filters for horizontal/vertical scaling, spline curve fitting, Fixed Pattern Noise and Dark Signal Non-Uniformity calibration and correction, ARM7/9 interface, AHB bus architecture, Serial Peripheral Interface masters/slaves for Flash ROM/sensor communication.* Worked with physical design teams to reach final timing closure, execute ECOs and achieve tape-out. * Helped PCB design teams to spec, design and debug characterization platform board.* Used both industry standard and in-house generated tools to increase efficiency/automation and retain control.* Managed several projects (teams of 3-8) to achieve project schedules.* Coordinated extensively with Ops team to generate and debug patterns for ATE testing.* Managed digital processing block design with local team for cutting edge Delta-Sigma ADC CMOS image sensor in conjunction with team in Israel, both on-site and remotely.
Vlsi Design Engineer
* Design and implemented graphics ASICs for the Radeon family of graphics accelerators and integrated northbridge chipsets.* Developed Host Bus Interface and AGP bus designs.
Vlsi Engineering Co-Op
Designed, implemented and verified a custom I2C chip interface module for broadbandset-top box ASIC. Developed custom PC image manipulation software.
Electrical Engineering Co-Op
Instrumented and automated lab with National Instruments data acquisition fortesting/developing a PTFE based Thermally Conductive Interface for electronic cooling.
Production Manager Co-Op
Performed and coordinated electronic assembly, testing and calibration of devices fortemperature monitoring at blood banks and laboratories.
Colleagues at AEye, Inc.
Other employees you can reach at aeye.ai. View company contacts →
Heidi Vallez
Colleague at Aeye, Inc.Hollister, California, United States
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NH
Nancy Huey
Colleague at Aeye, Inc.Redwood City, California, United States
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Daniel Plaster
Colleague at Aeye, Inc.Chicago, Illinois, United States
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Jm Sanchez
Colleague at Aeye, Inc.Chihuahua, Mexico
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Benlon Louie
Colleague at Aeye, Inc.Vallejo, California, United States
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JS
John Stockton
Colleague at Aeye, Inc.Austin, Texas, United States
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JP
Juan Perez
Colleague at Aeye, Inc.Mexico City, Mexico
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Aaron Basharain
Colleague at Aeye, Inc.San Leandro, California, United States
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AS
Amrutha S
Colleague at Aeye, Inc.Bengaluru, Karnataka, India
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SJ
Stephen Johns
Colleague at Aeye, Inc.Paris, Île-De-France, France
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Casey Mcmullen education
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Drexel University
Frequently asked questions about Casey Mcmullen
Quick answers generated from the profile data available on this page.
What company does Casey Mcmullen work for?
Casey Mcmullen works for AEye, Inc..
What is Casey Mcmullen's role at AEye, Inc.?
Casey Mcmullen is listed as Manager of FPGA Firmware Design at AEye, Inc..
What is Casey Mcmullen's email address?
AeroLeads has found 1 work email signal at @aeye.ai for Casey Mcmullen at AEye, Inc..
What is Casey Mcmullen's phone number?
AeroLeads has found 1 phone signal(s) with area code 650 for Casey Mcmullen at AEye, Inc..
Where is Casey Mcmullen based?
Casey Mcmullen is based in San Leandro, California, United States while working with AEye, Inc..
What companies has Casey Mcmullen worked for?
Casey Mcmullen has worked for Aeye, Inc., Revolutionice, Inc., Sony Electronics, Pixim, Inc., and Ati.
Who are Casey Mcmullen's colleagues at AEye, Inc.?
Casey Mcmullen's colleagues at AEye, Inc. include Heidi Vallez, Nancy Huey, Daniel Plaster, Jm Sanchez, and Benlon Louie.
How can I contact Casey Mcmullen?
You can use AeroLeads to view verified contact signals for Casey Mcmullen at AEye, Inc., including work email, phone, and LinkedIn data when available.
What schools did Casey Mcmullen attend?
Casey Mcmullen holds Bs, Electrical Engineering from Drexel University.
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