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Digital Logic Design Engineer with more than 20 years of experience focused on ASIC/FPGA SoC and embedded systems, video, graphics and digital image capture/processing, data acquisition and automated testing support. Dedicated to a verification-centric design flow for high quality results delivered on schedule. Comfortable working on mixed signal designs, experienced at interfacing with analog engineering to achieve success. Always interested in automating design tasks with scripting and tool flow customization for repeatability and efficiency. Track record of leading small teams of varied experience levels.Languages: Verilog, VHDL, some System Verilog/UVM, Perl, C/C++, Visual BasicTools: VCS, Incisive, ModelSim, Lint, CDC, Spyglass, Design Compiler, Primetime, Xilinx ISE/Vivado, Excel, MS Office, Unix/Linux, NI DAQ, LabView, MATLABStandards: AMBA, SPI, I2C, LVDS, MIPI, Gb Ethernet, SerDes
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Sr. Fpga Design EngineerAeye, Inc. Mar 2019 - PresentPleasanton, California, Us -
Logic Design Engineer (Contract)Revolutionice, Inc. Jul 2018 - Mar 2019* Architected and Implemented FPGA SoC to control autonomous commercial construction robot for startup.* Used Xilinx Zynq-7000 MicroZed on IO carrier card with Pmod and custom devices.* Developed custom control logic for PWM servo/motor control, rotary shaft encoder, 2D LiDAR capture/filtering, wireless remote control IF, etc.* Implemented Xilinx IP blocks for SPI, UART IF; AXI, APB bus/slaves; GPIO and user IF.* Interfaced with Gyro, Accelerometer, Magnetometer as IMU with software sensor fusion; Hokuyo/Garmin LiDAR rangefinders for mapping.* Developed baremetal Firmware and drivers for ARM Cortex-A9, interrupt and event timer driven in C/C++. Assisted Software team with developing robot control application Software. Generated customized PetaLinux/Ubuntu Linux kernels for dual ARM.* Tuned PID control loops for various drive/control brushed and BLDC motors.* Generated full wiring specification for robot chassis.
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International Family Travel Experience - Sailboat VoyagingN/A Aug 2017 - Jun 2018https://sailingmcmullens.wordpress.com/
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Digital Design EngineerSony Electronics Apr 2017 - Aug 2017San Diego - Us | Tokyo - Jp, Us -
Digital Design Manager/EngineerSony Electronics Nov 2012 - Aug 2017San Diego - Us | Tokyo - Jp, Us* Designed/Implemented CMOS image sensor ASICs and sensor control/image processing FPGAs for Research and Development, pre-production prototypes.* Worked closely with Japanese engineers and Japanese language documentation, on-site and internationally.* Brought designs through initial planning, specification, RTL coding, automated verification, design quality checks, synthesis and documentation for initial timing closure.* Managed several projects (teams of 4-6) with a focus on coordinating with international teams and delivering on schedule. -
Sr. Vlsi Design EngineerPixim, Inc. Jun 2001 - Nov 2012Mountain View, Ca, Us* Designed/Implemented CMOS image sensors, image processing embedded SoC ASICs for cutting edge products and sensor control/image processing FPGAs for prototyping.* Performed in a fast moving, high risk startup environment to create new High Dynamic Range imaging solutions for the security/surveillance markets.* Brought designs from initial planning, specification, RTL coding, IP integration, automated verification, design quality checks, synthesis and documentation, bringup and first silicon evaluation using Oscilloscopes, Logic Analyzers, etc.* Developed modules for image processing with kernel based digital filters for horizontal/vertical scaling, spline curve fitting, Fixed Pattern Noise and Dark Signal Non-Uniformity calibration and correction, ARM7/9 interface, AHB bus architecture, Serial Peripheral Interface masters/slaves for Flash ROM/sensor communication.* Worked with physical design teams to reach final timing closure, execute ECOs and achieve tape-out. * Helped PCB design teams to spec, design and debug characterization platform board.* Used both industry standard and in-house generated tools to increase efficiency/automation and retain control.* Managed several projects (teams of 3-8) to achieve project schedules.* Coordinated extensively with Ops team to generate and debug patterns for ATE testing.* Managed digital processing block design with local team for cutting edge Delta-Sigma ADC CMOS image sensor in conjunction with team in Israel, both on-site and remotely. -
Vlsi Design EngineerAti Oct 1998 - Jun 2001Santa Clara, California, Us* Design and implemented graphics ASICs for the Radeon family of graphics accelerators and integrated northbridge chipsets.* Developed Host Bus Interface and AGP bus designs. -
Vlsi Engineering Co-OpGeneral Instrument Corporation Apr 1997 - Sep 1997Horsham, Pennsylvania, UsDesigned, implemented and verified a custom I2C chip interface module for broadbandset-top box ASIC. Developed custom PC image manipulation software. -
Electrical Engineering Co-OpW. L. Gore & Associates Apr 1996 - Sep 1996Newark, Delaware, UsInstrumented and automated lab with National Instruments data acquisition fortesting/developing a PTFE based Thermally Conductive Interface for electronic cooling. -
Production Manager Co-OpMack Information Systems Apr 1995 - Sep 1995Wyncote, Pa, UsPerformed and coordinated electronic assembly, testing and calibration of devices fortemperature monitoring at blood banks and laboratories.
Casey Mcmullen Education Details
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Drexel UniversityElectrical Engineering
Frequently Asked Questions about Casey Mcmullen
What company does Casey Mcmullen work for?
Casey Mcmullen works for Aeye, Inc.
What is Casey Mcmullen's role at the current company?
Casey Mcmullen's current role is Sr. FPGA Design Engineer at AEye, Inc..
What is Casey Mcmullen's email address?
Casey Mcmullen's email address is cm****@****xim.com
What is Casey Mcmullen's direct phone number?
Casey Mcmullen's direct phone number is +165093*****
What schools did Casey Mcmullen attend?
Casey Mcmullen attended Drexel University.
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