Chad Saunders Email and Phone Number
Chad Saunders work email
- Valid
- Valid
- Valid
- Valid
Chad Saunders personal email
Chad Saunders phone numbers
Chad Saunders is a Senior Logic Design Engineer at NVIDIA at NVIDIA. He possess expertise in fpga, vhdl, verilog, xilinx vivado design suite, circuits and 3 more skills.
-
Senior Logic Design EngineerNvidia Aug 2023 - PresentSanta Clara, Ca, Us
-
Hardware Engineer IiMicrosoft May 2022 - Aug 2023Redmond, Washington, Us• Implemented a shared memory, cache-based counter design to handle up to 512M counters that each track byte and packet counts for customer billing.• Designed a method to use the shared memory counter for per-VM telemetry that is aggregated into cloud metrics.• Performed design, verification, and support for an FPGA in Azure that executes cloud computing packet acceleration.• Created a design to track the current TCP state of each connection, from the SYN handshake through the FIN handshake, based on incoming packets.• Built an arbiter for a PCIe stream interface that operates at maximum data rate and provides telemetry on requests sent and responses received.• Acted as the on-call engineer to respond to customer incidents when necessary and perform live debug. -
Specialist Electrical Engineer (L3)L3Harris Technologies Aug 2020 - Mar 2022Melbourne, Florida, Us• Created a robust clock and data recovery algorithm using an ADC to enable data processing at low input signal levels.• Led the firmware effort for a proprietary circuit card for all stages of design and test.• Presented a custom firmware implementation idea to the customer, received a request for proposal, and submitted a bid for the effort.• Researched PCIe Gen 3 TLPs and designed completer and requester interfaces for multiple data word transmission. • Developed Visual Basic and Python test software to perform a proof-of-concept demo for the customer which resulted in a $1.2 million contract being awarded.• Architected a proprietary serial link between FPGAs for command/control and critical event communication.• Guided a team of interns in a process improvement task to document and verify functionality of aging reuse designs. -
Senior Associate Electrical Engineer (L2)Harris Corporation Jul 2018 - Aug 2020Melbourne, Florida, Us• Implemented physical and timing constraints for a top-level design, including constraints for pin locations, voltage levels, clocks, and clock domain crossings.• Explored bitstream encryption on Xilinx UltraScale FPGAs using the MASTER_JTAG primitive and Xilinx SDK C code.• Designed a module that uses a MicroBlaze to program the on-chip BBRAM with an encryption key for bitstream encryption and verified functionality in the lab.• Debugged firmware designs and device interfaces in a lab environment using simulations, Vivado ILAs, and oscilloscopes.• Completed a generic firmware update module that uses ping-pong buffered RAMs to enable automatic program, erase, sanitize, and readback procedures for flash memory.• Conducted phone screens and on-site panel interviews for new college graduate candidates. -
Fpga Design InternNorthrop Grumman May 2017 - Aug 2017Falls Church, Va, Us• Modified the Xilinx Aurora 64B/66B IP core to reduce FPGA BUFG usage by implementing BUFHs.• Debugged the Aurora 64B/66B cores with the Vivado ILA and Ruby scripts in a lab environment.• Designed and updated VHDL blocks to realign serially transmitted packets into a parallel configuration for processing.• Simulated the packet realign blocks to ensure correct output of data based on packet header information. -
Circuits 1 Lab Teaching AssistantUniversity Of Florida Aug 2015 - Apr 2017Gainesville, Florida, Us• Taught lab experiments while fielding questions and explaining theory behind the lab.• Evaluated homework and lab reports and hold office hours to assist students to understand concepts. -
Ground Systems InternNorthrop Grumman Aerospace Systems May 2016 - Jul 2016Falls Church, Va, Us• Created and modified VHDL code files to program and synthesize FPGAs.• Simulated and implemented a pseudorandom number transmitter/receiver and auto aligner.• Wrote Ruby scripts to test FPGAs and their interfaces in the lab.• Developed a hardware sanitization procedure to clear non-volatile memories on circuit boards.• Diagnosed power and data transmission issues on an FPGA circuit board.
-
Avionics College InternNorthrop Grumman Aerospace Systems May 2015 - Jul 2015Falls Church, Va, Us• Worked in the Avionics group of the E-2/C-2 Program in the Aerospace Systems sector• Analyzed aircraft wiring diagrams to create spreadsheets of parts designated for removal.• Modified technical compliance documents to align with updated requirements.• Tested avionics equipment in labs and evaluated results.• Designed plots of test data for use in presentations to suppliers.
-
Front Service ClerkPublix Super Markets Jun 2012 - Dec 2014Lakeland, Florida, Us• Trained new employees in daily duties and responsibilities.• Provided excellent customer service by meeting and exceeding customer needs. -
Electrical Engineering Student InternStellar May 2014 - Aug 2014Jacksonville, Fl, Us• Designed electrical systems, including lighting and power, for client projects. • Utilized AutoCAD to model electrical systems on building floor plans.• Performed calculations on wire sizes, electrical panel voltages, and branch circuits.• Created spreadsheets of calculations and data to present to clients and officials.
Chad Saunders Skills
Chad Saunders Education Details
-
University Of FloridaElectrical Engineering -
University Of FloridaElectrical Engineering
Frequently Asked Questions about Chad Saunders
What company does Chad Saunders work for?
Chad Saunders works for Nvidia
What is Chad Saunders's role at the current company?
Chad Saunders's current role is Senior Logic Design Engineer at NVIDIA.
What is Chad Saunders's email address?
Chad Saunders's email address is ch****@****ngc.com
What is Chad Saunders's direct phone number?
Chad Saunders's direct phone number is +170371*****
What schools did Chad Saunders attend?
Chad Saunders attended University Of Florida, University Of Florida.
What skills is Chad Saunders known for?
Chad Saunders has skills like Fpga, Vhdl, Verilog, Xilinx Vivado Design Suite, Circuits, Public Speaking, Leadership, Microsoft Office.
Who are Chad Saunders's colleagues?
Chad Saunders's colleagues are Pavankumar Gorla, Aeshah Hadges, Mba, Brian Yoonjae Kim, Ying Li, Jason Ramos, Julien Veron Vialard, Po-Wen Hsueh.
Free Chrome Extension
Find emails, phones & company data instantly
Aero Online
Your AI prospecting assistant
Select data to include:
0 records × $0.02 per record
Download 750 million emails and 100 million phone numbers
Access emails and phone numbers of over 750 million business users. Instantly download verified profiles using 20+ filters, including location, job title, company, function, and industry.
Start your free trial