Chang-Hong Wu Email and Phone Number

I am the chief silicon architect and technologist at Juniper Networks. During my 26+ years at the company, I lead the development of many generations of successful products pushing technology and performance boundaries, and communicate them to customers.Recently, I am responsible for the architecture and technology roadmaps of Juniper's routing/switching ASICs, and the systems they enable. In this role, I lead the definition of the architecture and collaborate with industry suppliers and partners to develop critical enabling technologies for each new generation of chipsets. Examples of the latter include eDRAM based memories, 3D memories, 112G-XSR interfaces, and chiplet-based in-package integration. Juniper ASICs pioneered the use of 3D memories and other technologies in networking products leading to great bandwidth, density, feature, and power advancements. I also work with various internal teams on signaling, thermal, and power delivery strategies for the new products.Apart from the product development responsibilities, I travel frequently to customer sites and events, including many of the world's top cloud data center, service provider, cable MSO, media, and financial companies, communicating with customers face to face on the architectural and technological advantages of Juniper's products, as applied to their experiences. I enjoy distilling complex ASIC architecture and technology topics and tradeoffs into generally accessible information, so that customers can understand the values and differentiations of our technologies and offerings. Customer dialogs also lead to improvements of our future products.I am very fortunate to be right in the middle of the golden years of the microprocessor and networking silicon innovations, and I enjoyed every minute of it. I look forward to many more years to come, especially in the intersection of AI/ML and networking arenas.