Founder
Current
Mar 2023 - Present
AeroLeads people directory · profile
Chao Chen Email & Phone Number
Analog IC Designer | Empowering Next-gen Ultrasound
at
SonoSilicon
1 work email found
@butterflynetwork.com
LinkedIn matched
✓ Verified August 2026
4 data sources
Profile completeness 100%
Current company
Role
Analog IC Designer | Empowering Next-gen Ultrasound
Location
Hangzhou, Zhejiang, China
Who is Chao Chen? Overview
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Quick answer
Chao Chen is listed as Analog IC Designer | Empowering Next-gen Ultrasound at SonoSilicon, based in Hangzhou, Zhejiang, China. AeroLeads shows a work email signal at butterflynetwork.com and a matched LinkedIn profile for Chao Chen.
Chao Chen previously worked as Founder at Sonosilicon and Senior Analog Design Engineer at Butterfly Network, Inc.. Chao Chen holds Phd, Microelectronics from Technische Universiteit Delft.
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Email format at SonoSilicon
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{first_initial}{last}@butterflynetwork.com
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Profile bio
About Chao Chen
A creative and passionate custom IC and system designer with full dedication in making next-generation medical imaging more accurate and more accessible, by leveraging emerging semiconductor manufacturing and circuit design technologies.RESEARCH INTERESTS:• Advanced medical imaging devices and systems•
Listed skills include Matlab, Engineering, C, Verilog, and 22 others.
Current workplace
Chao Chen's current company
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6 roles
Chao Chen work experience
A career timeline built from the work history available for this profile.
Senior Analog Design Engineer
Nov 2017 - Dec 2022
Ph.D Candidate
My Ph.D. research focused on the analysis, design, implementation and characterization of front-end ASICs for 3-D medical ultrasound imaging. Dissertation: “Front-End ASICs for 3-D Ultrasound: From Beamforming to Digitization” Main achievements: 1. The first full-matrix front-end ASIC enabling in-probe digitization with <1mW/element power efficiency Published in: ISSCC-2018 (Press-kit highlight), IUS-2017 (Best student paper), JSSC-2018(Nov.)2. The first reported 2-D array front-end ASIC integrated with 1000+ transducer elements, realizing analog subarray beamforming with record RX power-efficiencyPublished in: VLSI-2016 (Press-kit highlight), JSSC-2017(Apr.), PMB-20183. An efficient approach for direct PZT-on-CMOS integration and its experimental demonstrationPublished in: TUFFC-2016 (Editor’s selection of articles 2017)4. A compact LNA architecture for ultrasound transducer with record noise-power-efficiency Published in: ESSCIRC-2015, JSSC-2017(Apr.) 5. A single-cable readout IC dedicated for broadband photoacoustic probes using PVDF transducer Published in: IUS-2015(1), UMB-2016Supervised master projects: 1. The first element-level band-pass delta-sigma ADC for 2-D PZT array, employing transducer as part of the electrical loop-filter Published in: ASSCC-2017 (Best student paper), JSSC-2018(Oct.)2. A front-end ASIC for forward-looking IVUS with both high-voltage TX and reduced-wire RXPublished in: CICC-2017, JSSC-2018(May), TUFFC-20183. A mixed-signal multiplexing system for cable-reduction in ultrasound probesPublished in: IUS-2015(2)
Dec 2012 - Oct 2017
Master Thesis Project
I designed and demonstrated the first clock-free self-timed incremental sigma-delta A/D converter based on zero-crossing-detection switched-capacitor circuits, under the supervision of Dr. Michiel Pertijs. This work was presented at ISSCC 2013, San Francisco, CA.
Aug 2011 - Nov 2012
Bachelor Thesis Project
During my bachelor thesis project at IMETU, I developed a 10-bit on-chip digital control block providing 128-channel multi-level signals for LCD driving. Results of post-layout simulation meet the specifications well. The design is realized in Chartered 0.35um 3.3V/18V mixed voltage process with full-custom design approach.
Mar 2010 - Jul 2010
Intern
I developed and tested an on-board 16-bit sinusoidal signal generator using ROM-based Direct Digital Synthesis (DDS) technology independently. Also I investigated the FPGA realization of more advanced DDS signal generator using the CORDIC algorithm to improve the phase noise performance.
Jun 2009 - Aug 2009
3 education records
Chao Chen education
Phd, Microelectronics
Bachelor, Micro-Nanoelectronics
Master, Microelectronics, Cum Laude
FAQ
Frequently asked questions about Chao Chen
Quick answers generated from the profile data available on this page.
What company does Chao Chen work for?
Chao Chen works for SonoSilicon.
What is Chao Chen's role at SonoSilicon?
Chao Chen is listed as Analog IC Designer | Empowering Next-gen Ultrasound at SonoSilicon.
What is Chao Chen's email address?
AeroLeads has found 1 work email signal at @butterflynetwork.com for Chao Chen at SonoSilicon.
Where is Chao Chen based?
Chao Chen is based in Hangzhou, Zhejiang, China while working with SonoSilicon.
What companies has Chao Chen worked for?
Chao Chen has worked for Sonosilicon, Butterfly Network, Inc., Delft University Of Technology, Tsinghua University, and Suzhou Institute Of Nano-Tech And Nano-Bionics (Sinano), Chinese Academy Of Sciences.
How can I contact Chao Chen?
You can use AeroLeads to view verified contact signals for Chao Chen at SonoSilicon, including work email, phone, and LinkedIn data when available.
What schools did Chao Chen attend?
Chao Chen holds Phd, Microelectronics from Technische Universiteit Delft.
What skills is Chao Chen known for?
Chao Chen is listed with skills including Matlab, Engineering, C, Verilog, Ocean, Vhdl, Cadence Virtuoso, and Altium Designer.
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