Charan Kumar Email & Phone Number

I am a Mixed Signal Circuit Design Engineer Intern at Qorvo, where I focus on designing critical components such as a programmable input buffer for RF SOI switches and ensuring glitch-free transitions in digital step attenuators. My expertise spans both analog and digital design, with a particular focus on CAD tools and physical design flows. I have hands-on experience with physical design implementation, static timing analysis, and physical verification using tools like Cadence Virtuoso, Synopsys Design Compiler, and HSPICE.In addition to my professional experience, I am pursuing a Master of Science in Electrical Engineering at Arizona State University (GPA: 4.00/4.00) and have served as a Graduate Teaching Assistant for the Analog Integrated Circuits course, where I supported students in using Cadence tools and designed course projects.Throughout my academic journey, I have developed a range of analog circuits, including a low-dropout regulator (LDO) and telescopic operational amplifier using Cadence Virtuoso. My LDO design, which regulated input voltages from -3V to -5.5V, significantly improved the settling time of a storage capacitor to 0.5 µs. In another project, I designed a telescopic op-amp that achieved a 64 dB DC gain and a 52 MHz unity gain bandwidth, demonstrating proficiency in both simulation and layout design.A highlight of my academic projects includes completing the RTL-to-GDSII flow for a Graph Convolution Network (GCN) design in 7nm technology. I performed synthesis, place and route, and physical verification, ensuring low power consumption and meeting tight latency constraints. Additionally, I have developed custom EDA tools for tasks like static timing analysis and floorplanning using Python, optimizing design flows and improving efficiency.I am currently seeking opportunities in Physical Design, Analog Design, and CAD Engineering, where I can apply my CAD expertise and experience in EDA tool development to contribute to innovative projects.