Charles C.

Charles C. Email and Phone Number

Director of Advanced Technology Development and Analytics @ Intel Corporation
(408) 765-8080
Charles C.'s Location
Hillsboro, Oregon, United States, United States
Charles C.'s Contact Details
About Charles C.

Experienced Executive / Senior Manager & Technical Leader who has led all phases of the Silicon Integrated Circuit manufacturing life cycle ( 0.8um - 1nm): technology feature definition, DR and PDK development, DTCO / DFM optimization, process-device development, product-process development, reliability improvement, yield-performance co-optimization, process-product-certification, volume yield ramp, fab process transfer and matching, Greenfield factory hiring, startup, high volume manufacturing ramp, and cost reduction, for 10+ generations of CPUs, SoCs integrated circuits and memory ( DRAM / NOR Flash ) products at best in class metrics.

Charles C.'s Current Company Details
Intel Corporation

Intel Corporation

View
Director of Advanced Technology Development and Analytics
(408) 765-8080
Website:
intel.com
Employees:
10
Charles C. Work Experience Details
  • Intel Corporation
    Director
    Intel Corporation Aug 2024 - Present
    Santa Clara, California, Us
    General Manager of ATDA responsible for Intel Logic Technology Development Yield, Sort/Test, FA/FI, Device, MIE, Inline Defects, External Engagements, and Fab Metrology.
  • Intel Corporation
    Technical Assistant
    Intel Corporation Mar 2024 - Aug 2024
    Santa Clara, California, Us
    Technical Assistant to the Corporate VP and Co-General Manager of Logic Technology Development
  • Tsmc
    Technical Director Of Operations
    Tsmc Nov 2020 - Dec 2023
    Hsinchu, Taiwan, Tw
    Manager of F21 E1 Division responsible for Integration, Device/WAT, Yield, Fab Customer Interface, YED ( Yield Excellence Department) - Fab Defect Metrology Departments for N4. The team supported HVM NTO, process improvement / development and manufacturing in Tainan F18 N5 and N4 for ~18 months.
  • Applied Materials
    Senior Director & Account Technologist
    Applied Materials Jan 2019 - Oct 2020
    Santa Clara, Ca, Us
    Lead integration technologist for internal roadmap tool feature definition, integrated process development, and customer demo for an advanced new cluster tool application enabling continued Moore’s Law scaling!
  • Pdf Solutions
    Engagement Director
    Pdf Solutions Sep 2016 - Dec 2019
    Santa Clara, California, Us
    Led a team of 14 consultants and analysts in driving a client's successful accelerated development of IP verification, DTCO, Process Yield & Performance for N and N+1 logic process
  • Intel Corporation
    Ltd Soc Program Manager And D1C Yield Department Manager
    Intel Corporation 2002 - 2016
    Santa Clara, California, Us
    Led the development, process certification, yield ramp, and transfer of SoC derivative and logic shrink for 90nm, 65nm, 32nm, 22nm, 14nm process nodes, including 22FFL and 22nm eDRAM.Co-manager of the D1C Integration, Device, Yield, Product, Defect Metrology, FA, and Q&R departments.
  • Intel Corporation
    Fab 22 Yield Department Manager
    Intel Corporation 1999 - 2002
    Santa Clara, California, Us
    Led the Integration, Product, Device, Yield, Defect Metrology, Q&R, and Labs Departments in the mother fab seeding, transfer, ramp, and volume production of 130nm Logic and SoC products.
  • Intel Corporation
    Fab 20 Integration Section Manager
    Intel Corporation 1998 - 1999
    Santa Clara, California, Us
    Led the FEOL Integration team in the ramp and manufacturing of 180nm Logic CPUs
  • Intel Corporation
    Ptd D1B Feol Integration Lead
    Intel Corporation 1996 - 1998
    Santa Clara, California, Us
    Lead TD integration engineer for 180nm GateOxide and Poly Patterning development for high performance CPUs
  • Intel Corporation
    Fab 7 Flash Memory Integration Manager
    Intel Corporation 1995 - 1996
    Santa Clara, California, Us
    Led the development, certification, and ramp of 0.4um NOR Flash
  • Intel Corporation
    Fab 7 Senior Flash Memory Integration Engineer
    Intel Corporation 1993 - 1995
    Santa Clara, California, Us
    Lead MEOL integration engineer for the transfer and ramp of 0.8um and 0.6um NOR FLASH.
  • Ibm
    Ibm Microelectronics Staff Engineer
    Ibm 1991 - 1993
    Armonk, New York, Ny, Us
    Midsection Integration engineer for 0.25um SiGe BiCMOS transfer and Defect PLY engineer for 64MB DRAM development

Charles C. Skills

Ttqs Training 商場/餐廳管理 宿舍管理 交通車管理 活動企劃 Recruiting Cmos Ic Asic Semiconductors Soc

Charles C. Education Details

  • Stanford University
    Stanford University
    Electrical Engineering
  • University Of California, Berkeley
    University Of California, Berkeley
    Electrical And Electronics Engineering

Frequently Asked Questions about Charles C.

What company does Charles C. work for?

Charles C. works for Intel Corporation

What is Charles C.'s role at the current company?

Charles C.'s current role is Director of Advanced Technology Development and Analytics.

What is Charles C.'s email address?

Charles C.'s email address is cl****@****hoo.com

What is Charles C.'s direct phone number?

Charles C.'s direct phone number is +150375*****

What schools did Charles C. attend?

Charles C. attended Stanford University, University Of California, Berkeley.

What are some of Charles C.'s interests?

Charles C. has interest in Social Services, Environment, Poverty Alleviation, Disaster And Humanitarian Relief, Arts And Culture, Health.

What skills is Charles C. known for?

Charles C. has skills like Ttqs, Training, 商場/餐廳管理, 宿舍管理, 交通車管理, 活動企劃, Recruiting, Cmos, Ic, Asic, Semiconductors, Soc.

Who are Charles C.'s colleagues?

Charles C.'s colleagues are Steven Clark, Jason Hu, Devyn Ooi, Madhan Mohan, Ferdie Mayo, Robert Barinov, Mohamad Azrin Abdul Halim.

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