- Drive innovative stress and test methodology to enable automotive quality on advanced technology nodes cost-effectively.- Lead research on Machine Learning applications for semiconductor manufacturing and test process.

- Director of Product Enablement in AMP Operations.- Managing a group of technical experts with diversified Product and Test Engineering expertise, as well as global NVM and Burn-In Engineering teams, to enable cost-effective Automotive microcontroller products with the highest degree of quality.- Direct a cross-functional global team on implementing a new Advanced Burn-In (ABI) methodology to result in significant cost savings in addition to quality improvement for automotive microcontroller products.- Global technical leader for NVM related test, software and application issues.

Manage 3 global teams: one for NVM Product and Test engineering including design validation and production test software development , one for MCU Burn-In stress/test software development, and one for NVM software device driver and applications development.- Responsible to develop and support new product introduction (NPI) and industrialization of Freescale MCUs with embedded NVM, including post-silicon design validation, test software development, yield enhancement and test time reduction.- Lead teams to develop automatic post-silicon design validation hardware and software systems that greatly improved the validation cycle time and enabled timely feedback to design to minimize design re-spin.- Lead cross functional teams (more than 200 people engaged) for Burn-In optimization projects for all Freescale automotive MCUs. Defining high-level Burn-In optimization strategy and providing technical guidance to product teams to evaluate and implement Burn-In reduction and/or elimination flows which has saved Freescale millions of dollars.- Lead research on novel debug and test methodologies for NVM, resulted in more than 20 filed patents.- Go-to person for any NVM related test, software and application issues. Guided Applications team and Failure Analysis teams resolve critical customer issues. Provided trainings on NVM technologies, test and applications to various teams. - Lead the efforts to improve the NVM yield and test time for 90nm and 55nm automotive microcontrollers.- Chief architect and development lead of the EEPROM emulation on several generations of eNVM technologies used in automotive applications

- Lead the post-silicon design validation efforts for embedded NVM and drive NVM technology debug activities on evaluation boards (EVB), burn-in systems and J750 testers. Discovered several crucial design issues and helped design team resolve those issues. Many of the solutions have turned into filed patents.- Test lead for NVM production tests and characterization. Lead the efforts to develop the infrastructure for a new class of test method for embedded NVM to achieve better fault coverage and code re-usability.- Chief architect and development lead for NVM software drivers and applications on microcontrollers in automotive industry. Managing a CMMI SEI-5 certified software development team consisting of up to six software engineers. - Lead flash driver definition, development, testing and deployment for several generations of eNVM technologies that conform to the AUTOSAR standard. All release software meets ongoing customer and tool vendor needs for production-grade automotive software.

Project leader for development of standard software device drivers for various Motorola Flash memory technologies. Design validation of embedded Flash memories on evaluation boards. Develop test software to analyze devices with embedded Flash and to be incorporated into Flash test flow. Work with sales engineers, field application engineers, customer advocates and designers from multiple divisions to support flash applications for customers, 3rd party tool vendors, production programming houses, application developers and the factory. Manage a subcontractor team of six software engineers for software project development.

Embedded software development used in memory testers for various memory technologies. Developed the embedded software implementing memory parametric and functional tests for various memory modules. Code developed in C and Assembly and ran on Arm processor embedded in the memory tester. Developed the embedded software used in the industry-first multi-site tester for Rambus DRAM (RDRAM). It enables simultaneous testing up to eight RDRAM devices in parallel, which greatly reduces the testing cost and improves the testing speed. Developed the GUI (graphics user interface) and test utilities for the test software using C++/MFC programming. Developed the timing calibration software including the GUI and the embedded code for DDR DRAM tester. Optimized the timing calibration software for SDRAM testers. Successfully reduced the calibration time from 12 hours to 4 hours after the code optimization.