Sr. Manager – HAMR Wafer Integration •Responsible for Heat Assisted Magnetic Recording (HAMR) production head integration. Sr. Program Manager – New Product Introduction (NPI) Magnetic Head Operations •Slider Bias: Drive core team member for head division, design validated and production ready. •MEW Sigma Reduction Task Force Lead: 35% sigma reduction in 6 months (matching best in class) prior to production ramp. •Two-Dimensional Magnetic Recording (TDMR): Managed cross-functional team to build and test TDMR multi-sensor heads.

• Responsible for Alta’s GaAs wafer substrate “Reuse” technology- Increased pilot line productivity 300%, yield 10% (to 95%), and COC reduced by 25%.- Technical owner for Alta’s GaAs wafer roadmap and supplier development.• Developed and qualified a GaAs wafer reclaim program saving $1M+ in the first year.• Responsible of front cell Cu metallization and manage outsourcing to PCB supplier.-Includes both dry film and screen print imaging with Cu electroplating.-Developed operational and quality systems to increase productivity 300% and yield 10%.

•An early core team member responsible for the research and development of Solyndra’s cylindrical CIGS based thin film solar modules.•Hired and managed a team that developed the front end glass substrate, backend glass packaging, and surface preparation technologies from the laboratory to volume manufacturing and physically scaled from 100mm to over 1000mm in less than 2 years. •Responsible for developing Solyndra’s glass tube specifications (front end substrate and back end encapsulation) and driving the qualification of several glass tubing suppliers to support production ramp from 2MW in 2008 to 60MW in 2010.•Solyndra’s unique application required a low cost glass tube with a combined chemical, dimensional, and thermal stability requirement did not have known solutions requiring significant invention and intimate technical collaboration – resulting in world class tubing suppliers recognizing that they made significant technical advancements while working with us.•Owned the front end glass substrate cleaning process, equipment, and automation requirements – scaling from 10’s of tube per hour to a fully automated and integrated unpacking, dimensional measurement/sorting, and cleaning system capable of 2400+ tubes per hour.

Sr. Engineering Manager – Photolithography Track Technology•Process technology manager responsible for leading the process team to develop and support the alpha release of a photolithography track system. •Hired and mentored a top notch new college graduate process group that successfully and efficiently demonstrated module (coat, bake, and develop) and system level requirements.•A notable technological achievement was the development of a post exposure bake (PEB) technology with wafer shape compensation enabling improved critical dimension uniformity (CDU)

Member of Technical Staff – Cu Electrochemical Plating (ECP) Technology (2003-2004)•Investigated the enhancement of Cu ECP with applied acoustic energy (US20070170066A1).•Appointed as a project lead to reduce the on wafer pattern dependency of Cu ECP that after one year, did not meet performance requirements, or have known solutions. Within six months successfully concluded project exceeding process as well as stretch productivity requirements.•Led a cross-functional team to re-design the Applied Materials’ SilmCellTM spin rinse dryer (SRD), that originally added hundreds of defects and chipped wafers. Project completed 25% ahead of schedule and material cost reduced by 25%.Member of Technical Staff – Wet Clean Technology (2000-2003)•Hands-on technology lead for the development of the Applied Materials’ Oasis CleanTM System – a 300mm single wafer wet spin cleaning system, from concept to customer release. •Led the compositional development of AM Clean, an all-in-one cleaning solution replacement of the conventional SC1 and SC2 sequence, enabling a cost competitive single wafer spin cleaning process - reducing the cycle from ~1 hours to <2min with less than 1Å of surface etching.•Developed a method to eliminate a particle deposition phenomena related to spin cleaning with alkali based solutions that added 100’s of defects a 20% occurrence rate - a product release “showstopper” (US Patent 7163018). •Developed an aqueous based post-metal etch clean for aluminum interconnect technology, resulting in penetration into and multiple tools placed at leading DRAM customer.

•Successfully managed a 300mm silicon wafer reclaim project from conception to pilot production in less than 1 year. Integrated process is capable of reclaiming virtually all wafer types (including copper), removing unwanted materials from all surfaces and finishing to prime test wafer specification.•Developed a chemical and mechanical film removal methodology to prevent copper cross contamination in the “non-copper” reclaim process and copper specific reclaim process.•Selected as the technical lead to solve a two year long customer issue, determined the root cause and implemented improvements to re-qualify recovering over 15% of yearly revenue.

•Served as a key core team member of the start-up of a leading edge 200mm silicon wafer manufacturing facility.•Responsible for the specification, installation, and qualification for pre-polish, post-polish, and final cleaning processes and supporting equipment. •Determined parameters critical to process monitoring for both SPC and online production system implementations.

•Honors include being designated an Initial Entry Training Fast Tracker, a New Jersey Merit Award, and a National Defense Medal.•Mechanized Infantry - TOW Gun