Chris Rayner Email & Phone Number

Andover, Ma, Us

Beverly, Ma, Us

New York, New York, Us

Contributed to the architectural analysis and migration for a series of 2K (custom) and 4k video display panels to a hardened forward facing (10+ year) design based around components manufactured by automotive and aircraft industry suppliers. Helped develop network topology models in various deployments including installation on 13 different commuter rail cars used throughout the NYCT system as well as fixed panel deployment in stations. Worked through vendor selection and contract development/award process. Program is slated for deployment over 3 years with a budget of $800M introducing an advertising and information display system of approximately 50,000 panels to the New York Transit system. Immediate availability.

Rueil-Malmaison, Île-De-France, Fr

Enterprise management systems development. Support of touchscreen LCD displays for line of power converters. Development of ZigBee mesh end nodes/coordinators/routers for line of remote environmental monitoring sensors. Development of small solar charge solution for zero-downtime mesh networking. Initial HW design / debug / firmware integration of rack monitor produt line w/Gigabit POE switch for powering remote cameras. FPGA development using open source linux toolset (Icarus Verilog/GTKWave)

Developed firmware for FPGA based queue management engine with 1Gb ethernet front end feeding 8 print head queues.

Established CNC machine shop based Startup Company. Primary product line was series of motorcycle products targeting the sport bike racing community. Company was full manufacturing, raw goods in, and finished product out. Lined up vendors, subcontractors and financing. I developed a 72-page business plan with marketing and sales channel focus. I managed single channel sales growth to $130K in fiscal 2008. 2-1/2 dimension designs were implemented in Autocad, tool paths run via Mastercam v8.0. Products were machined from 6061 on company’s 2004 Haas VF2SS vertical machining center. Company also performed vacuum formed plastic mold making services for various packaging companies. Wireframes were generated in Autocad and imported into Mastercam X2SP2 where 3D surface models were developed and tool paths generated. Company sold in early 2009.

Palo Alto, California, Us

6 mo contract extended to 32 months Supported ASIC emulation cards and development boards for line of H264 decoder chips. Design/layout/bring up of BluRay DVD reference design that eventually became basis for LG, and Samsung commercial products.

· Architectural development and implementation of 4-port STS-12 cross connect card for Chromatis 4500 optical switch, providing trunk grooming at the VT1.5 sub rate. · Architectural development and hardware lead for multi-function circuit emulation line card designed to work as a front end to a PON solution (i.e. Verizon FiOS equivalent). · Design was capable of performing aggregation/performance monitoring on 56 (42) T1 (E1) line interfaces, 2 structured/unstructured DS3 or STS1 interfaces, expandable to 4 with additional daughter card. Architecture was fully hot-swappable, and fault tolerant with automatic reconfiguration/repartitioning..· Designed hardware, wrote FPGA code in verilog, developed embedded diagnostic framework in C running under VXWorks. Brought-up design in lab (typical analyzer/emulator based debug cycle), verified and debugged to full functionality. · Wrote hardware specification, developed schedules and needed documentation. Led group of 4 engineers and 2 technicians.· Interfaced with PMC as an early integrator of PMC/Sierra's TEMUX chip; finding/debugging chip driver issues along the way. Delivered production ready design on time within budget in 1 re-spin cycle (motherboard, daughter card, 1-dual board I/O module, 1 3-board I/O module). Lucent purchased Ignitus on 3/5/2000 for 2.20M.

· Implemented adaptive rate clock recovery FPGA for 8-port T1/E1 circuit emulation card. · Performed debug and re-spin of 10/100 Ethernet line card due to improper 2.5V plane layout and bugs in auto-negotiation cycle.

Burlington, Ma, Us

· Design and implementation of ASIC validation environment in C++ and VHDL centered around proprietary socked based simulation interface. · Developed behavioral simulation (dataflow) model for streaming JPEG color correction engine as a standalone entity allowing test development to occur prior to delivery of structural code from the design group. · Developed targeted tests and a random testing environment. · Interfaced with designers to verify bugs, developed schedules and performed resource allocation.

Richardson, Texas, Us

· Architectural analysis and redesign of 6-port T1/E1 frame relay line card for Nexen8000 ATM switch. · Performed a full board level Verilog simulation on 8-microprocessor system (including 6 Motorola 68360 QUICC devices) using LMC simulation models.· Wrote QUICC diagnostic code in C for debug in simulation. Resulting redesign had 1 miswire on a board with 5500+ nets.· Redesign of common verilog PCI interface FPGA common across the Nexen8000 line cards resulting in a more portable, smaller, faster implementation.

San Jose, Ca, Us

Added input buffers to un-buffered ATM OC3 line card - implemented in Lucent FPGA's 60K gate schematic based design. Developed i860 based processor module for Duckling ATM switch (joint venture w/Xerox PARC). Performed architectural analysis on several system topologies via discreet event simulation written in C++ resulting in improved throughput for several legacy bus architectures.

Modified open source "C" based packet driver software into suite of engineering system test software for line of modular stackable managed ethernet hubs. Drove manufacturing test efforts, provided DFM input, and initial system debug.

Developed a wide band high powered video amplifier for a line of DARPA funded spatial light modulators used in a missile guidance system test bench.

Wrote embedded systems diagnostics to aid in technician component level debug for series of disk drive and communications controllers. Trained 2nd shift technician staff resulting in 600% improvement in throughput. Brought up new test fixtures, characterized ASIC failures in custom silicon using embedded knowledge and black box test strategies pre-decavitation.