Christopher Ott Email and Phone Number
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I am actively innovating new and complex solutions involving Hardware, Software, and FPGA elements to bring the company visions to reality. Through leadership, mentoring, and technical guidance I enable cross functional team success. My key strengths span the analog, digital, FPGA, power, board and system level realm of design, from simple circuits through complex distributed architectures. I have successfully been the principal engineer and system architect through the development of multiple designs and products from concept through end of life. Through these roles I have directly provided guidance to multiple cross functional teams including mechanical, embedded firmware and software. Some of my most successful product contributions include: * Ixia Communication's NTO-7300 Network Packet Broker and Network Visibility Solution and * Anue System's NTO-5288 Network Visibility Solution family of platforms - both product lines above are designed to service and support: - carrier class service providers - defense and intelligence communities - financial markets and banking institutions - enterprise data centers * Dell's R805 Server designed to address the demands of virtualization in multiple markets including SaaS and cloud infrastructure * National Instrument's CompactRIO-9002/9004 controllers which I brought to completion to address the demands of industrial markets requiring embedded control with re-configurable I/O * Symmetricom's SSU-2000 and SSU-2000e that still addresses the global timing and synchronization requirements of the telecommunications industry after more than 15 years of continuous production * Harrison Systems Series-Ten which was the most advanced film and audio industry recording console of its day with fully automated recording and mixing capabilities Specialties: Signal Integrity, EMI, EMC, SFP+/SFP28, QSFP/QSFP28, XFP, 10GBaseKR, XFI, SFI, XAUI, High Speed Digital, NPU, GPU, FPGA, CPLD, Switching Power Supplies, Analog, PLL's, Embedded, Systems, Mil-Spec, Commercial, Industrial, Timing and Sync, DFM, DFA, DFT, DFS, DFR, DFC (Design for Manufacturability / Assembly / Test / Servicability / Repairability / Calibration)
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Cubic Mission Solutions / GatrAthens, Al, Us -
Principal Senior Electrical EngineerCubic Mission Solutions / Gatr Mar 2020 - PresentSan Diego, California, Us -
Senior Staff Engineer - AutopilotsCollins Aerospace Apr 2018 - Mar 2020Charlotte, North Carolina, UsFocused on updates to the the existing embedded Autopilot Hardware used in UAV Aerospace Systems.Defining the Architecture, Documenting, and Designing the future embedded ISR Hardware.Updated training in International Trade Compliance, and Export Classifications.Research and Trade Studies to evaluate advanced sensor suites for Air Speed, Altitude, Gyroscopic motion, Acceleration, and Magnetic detection (Compass).Presentation of Architecture Proposals, Design Specifications, Test Plans, and Critical Design ReviewsOngoing development of top level architectural specifications, block diagrams and other material, needed to cleanly implement schematic and board layout.Detailed schematic capture, net lists, BOM's etc and PCB layout leadership and review.Actively engaged in supply chain Risk Management.Current work includes Ethernet, SPI, CAN, I2C, FPGA, DDR3, and Boost/Buck POL supplies -
Hardware EngineerBiamp Systems Jul 2017 - Feb 2018Beaverton, Or, UsExperienced at development and deployment of:Large and Small scale Systems (Single board, multi-board, multi-platform, )Printed Circuit Boards (simple through very complex)Digital (FPGA and discrete logic)Analog (low noise, high precision)Design for manufacturing, test, assemble (DFx)Design for compliance (EMI, EMC, FCC, NEBS, etc) -
System Hardware Architect - Chief Technology OfficeRadisys Corporation Apr 2016 - Jun 2017Hillsboro, Oregon, UsFocusing on the integration and evaluation of new technologies to advance the performance of data center audio and video processing capabilities in the telecommunications environment. Enhancing rack scale architecture for data centers where speed of deployment, bring up and rapid field service is critical. Sled development through the integration of advanced acceleration hardware for media processing.Technical oversight of advanced Packet Management Hardware. -
System ArchitectSeagate Technology Oct 2014 - Apr 2016Fremont, Ca, UsDocumentation, Requirements Gathering, Board Bring-Up and Integration of large scale storage platforms. Supervision of ODM partners, Design Review of their electrical design, mechanical design, and software development.Specifically focused on extending the architecture of 5U 84 drive platform to from the current 6G SAS/SATA implementation, to 12G SAS and similar new technologies.Also deeply involved with defining the architecture for an entirely new class of JBOD controller aimed at the highest end of the drive performance spectrum. -
Hardware Architect For The Nto-7300 Product LineIxia Network Visibility Solutions 2010 - Oct 2014Key hardware lead, software liaison, hardware liaison, responsible for the Requirements Management and Written Communications, of a six slot, dual fabric, 7 rack unit chassis, with up to 3.84Tb of network switch capacity. This platform required Teamwork in depth Electrical Design and Analytical Skills in order to assure it was specifically designed for visibility into network traffic with a distributed Dual Isolated 48V power structure and a chassis capable of supporting up to a 2000W live load using a mix of: 10GE Line Cards 40GE Line Cards Carrier Line Module (AFM Capable) -- 10GE Advanced Feature Modules -- 40GE Advanced Feature Modules -- 100GE Modules Application and Threat Intelligence Processor Cards -- Deep Packet Inspection Packet Capture Modules Lawful InterceptHeavy emphasis on EMC Design, Technical Documentation, High Speed Design, Digital Circuit Design, and the use of lab equipment such as Spectrum Analyzers and Oscilloscope.This development project required significant Teamwork, Project Planning, Software Documentation for development of FPGA register definitions and functional descriptions.Bring-Up and Debug involved using Bash and Python as well as Quartus tools for the FPGA
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Principal Hardware Engineer IiIxia Network Visibility Solutions 2010 - 2014All aspects of advanced electronic hardware design, including defining the overall hardware architecture inside the latest 3.84-Terabit network packet broker, many of the mechanical packaging concepts for this platform, as well as key hardware interfaces, software functionality and RTL integration. Previously I have led the development of medium scale monolithic and modular systems, for networking hardware. I have applied and led much of the Signal Integrity effort to successfully deploy products with a large number of: 10Gbase-KR, KR4, HiGig, HiGig[42], HiGig[127], XAUI, XLAUI, CAUI, SFI, XFI, PCIe, PCB which include defining the PCB Stack Up, Power, Connector / Back Plane pin allocation, and CPLD RTL. As the System Architect I lead the systems integration and serve as the liaison across the electrical, mechanical, RTL and software teams.I have successfully completed and deployed NTO-7300 product. This Internet Protocol (IP) platform is a six line card / dual fabric chassis supports up to 288 native 1G/10G SFP+ ports and up to 96 native QSFP ports enabling up to 384 10G ports using optical breakout cables. By design it is targeted to the enterprise and carrier class markets requiring high availability.Previously I successfully launched the 2U 640Gb Network Visibility Switch supporting 1G/10G/40G/100G interfaces which can be configured with up to 16 40G interfaces or up to 64 1G/10G interfaces or up to 4 100G interfaces. Once the original NTO-5288 was launched it was enhanced and development continued into an entire family based on this core architecture including carrier class. The entire family includes the NTO-5288, NTO-5293, NTO-5260, NTO-5263, and NTO-5268.
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Systems Engineer For The 5288 Product FamilyAnue Systems 2010 - Sep 2014Performed Systems Engineering for the 640GbE modular platform specifically intended to allow flexibility in choosing up to four IO modules with features from -- 16 port 10GE/1GE -- quad 40GE (16x10GE with breakouts) -- single 100GE -- AFM 16 modules -- AFM 4 modulesResponsible for the Initial programming of the core FPGA to ensure proper Power Management, Power Sequencing, and reset states were implemented for the platform.
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Systems EngineerCalxeda - Formerly - Smooth-Stone Inc. 2009 - 2010Austin, Tx, UsPrepared Board and System Level conceptual design for ultra low power / high performance applications server application for multi-core ARM based processors. Helped generate presentation materials using Microsoft Office's Power Point and Visio tools along with proofs of concept for boards layouts that led to the company landing initial funding.One Patent application 20140359323 has been submitted -
Senior Applications EngineerIntegral Wave Technologies Inc 2007 - 2009Directly responsible for Customer Support leading to multiple design wins for our highly integrated multi-rail switching point of load power supplies with integrated comprehensive control and instrumentation. Focused on system evaluation and integration of our part into customer designs, development of multiple applications notes, and extensive characterization testing of engineering level and pre-production level product. Automated the temperature chamber, voltage supplies, and all loading used in the final characterization of the product using LabView.
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DelegateDelegate To The 2008 Convention 2008 - 2008Round Rock, Texas, Us -
Senior Systems EngineerDell Inc 2006 - 2007Round Rock, Texas, UsSecond Systems Lead and Product Development Engineer for a dual socket, AMD based, 128GB capable 2U server (Dell R805) optimized for virtualization. Integral in the finalization of the system architecture including a novel USB/SD solution for the the Non-Volatile boot drive implementation. Led the way to resolving the issue of keeping the base Ethernet connection mapped to the same PCIe address regardless of the boot operating system.A little about the Dell R805 - - https://www.dell.com/content/topics/topic.aspx/global/products/pedge/topics/en/pedge_r805_landing?c=us&l=en -
Senior Hardware EngineerNational Instruments 2003 - 2006Austin , Texas, UsMultiple product designs and launches within the cRIO and cFP product lines. Substantial EMI reductions in multiple products as well. Instrumental in resolving signal integrity issues in the cFP back planes. Key person in the resolution of problems blocking the release first generation cRIO controllers. Successfully executed a major last minute architectural change and released the cRIO controller on the first spin leading to multiple millions of dollars in revenue for the company.Compact RIO - Controller (cRIO-9002 & cFP-9004)http://sine.ni.com/ds/app/doc/p/id/ds-200/lang/en/pdf/yes/pdfCompact FieldPoint (cFP-1804 & cFP-1808)http://www.ni.com/pdf/products/us/2005_6072_161_101_d.pdfCompact FieldPoint (cFP-2000, cFP-2010 & cFP-2020)http://www.ni.com/pdf/products/us/4dio518_521.pdfCompact FieldPoint (cFP-BP-4 &cFP-BP-8)http://www.ni.com/pdf/products/us/cat_cFP_Backplane.pdf -
Hardware EngineerSymmetricom (Formerly Austron / Datum) Recently Aquired By Microsemi 2001 - 2003Aliso Viejo, Ca, UsMultiple hardware designs including one using fractional "N" frequency synthesis and many using FPGA's and CPLD's. Most designs were developed for operation in a synchronous and redundant mode for hit-less fail-over and high availability. Developed a robust differential signaling and protocol extension to the SPI interface. Developed a single cycle detection and switchover CPLD for the SSU2000 line cards and Expansion chassis clock modules. Debugged and implemented the SSM communications for the redundant PRR-10 controller modules.A little about the Datum SSU-2000 - - http://www.symmetricom.com/products/time-frequency-distribution/bitsssu/SSU-2000-and-SSU-2000e/It is rewarding to see systems I helped design and implement more than a decade ago still in use and still being expanded upon. -
Hardware EngineerCisco Systems 1999 - 2001San Jose, Ca, UsMultiple line card product designs and Software updates including embedded firmware development using C and C++. Lead board level hardware developer for the third generation DSLAM network interface cards intended for use as redundant modules. Multiple presentations for customers on the subject of QOS traffic priority and performance limitations in blocking architectures. -
Hardware EngineerDatum / Austron 1996 - 1998Developed a robust differential signaling and protocol extension to the SPI interface. Developed a single cycle detection and switchover CPLD for the SSU2000 line cards and Expansion chassis clock modules. Debugged and implemented the SSM communications for the redundant PRR-10 controller modules. These platforms require High availability and resiliency necessitating an in depth understanding of the RIsk Management requirements within the telecommunications environment.
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Hardware EngineerDresser Wayne 1994 - 1996Austin, Tx, UsHardware design engineer responsible for researching and deploying the initial version of "Speed Pass" for Mobil prior to the merger with Exxon. Carried out field studies of the overhead antenna systems and vehicle mounted transponder model. Recommend moving to a split RF system relying on a low frequency RF to energize the systems and high frequency reply. Developed the intrinsic safe barrier for the dispenser to reduce costs by eliminating the need for explosion proof housings below the vapor barrier. -
Hardware EngineerAvex Electronics 1992 - 1993I created original designs of 486 based CPU boards for OEM customers, performed component qualification, and carried out sustaining engineering on existing products.
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Project / Design EngineerSci Systems Inc 1987 - 1992Hardware design engineer developing analog and digital flight test instrumentation used on the Titan IV launch platform for the Space Systems division. Key engineer leading the design of a rack mounted avionics flight hardware test set to emulate the instrumentation of a helicopter including the development of a solid state LVDT transponders.Developed a multi-rate serial capture card for flight telemetry, including the on card firmware, the system software drivers, and the API for the top level software. Developed and optimized the architecture for the bit-slice controller for the Titan-IV DDAS data acquisition system. Granted a security clearance as needed. Later joined the commercial side and managed third party ODM's developing 486 based PC's for DELL.
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R&D EngineerHarrison Systems Inc. 1982 - 1987Designed the original controller and keyboard for the Series X automated recording console. This was the worlds first digitally controlled, fully automated, analog recording console for the film and audio industry. This was also the first product from Harrison that individually sold in excess of $1 million for one console. It contained so many 8051's that it requires a special export license at the time to be sold overseas. Developed a dual 8051 processor card including the required bus arbitration for sharing a common address / data bus. Gained my first exposure to programmable logic devices and incorporated an asynchronous state-machine, as well as more traditional logic.The Series X (Known as the Series Ten) is described in the history section on the companies website.http://www.harrisonconsoles.com/joomla/index.php?option=com_content&task=view&id=31&Itemid=31Early CAD work was done by hand then entered into the Gerber Scientific also by hand to produce the punch tape drill files and then drive the old photo plotter.Hand Taping a board - - https://www.facebook.com/photo.php?fbid=385607654830790&set=a.382416065149949.91134.382365111821711&type=3&theaterThe Gerber Scientific - - https://www.facebook.com/photo.php?fbid=382639335127622&set=a.382416065149949.91134.382365111821711&type=3&theaterAnd the photo plotter - - https://www.facebook.com/photo.php?fbid=382639335127622&set=a.382416065149949.91134.382365111821711&type=3&theaterWe even "signed" our work like they did at Apple. - - https://www.facebook.com/photo.php?fbid=385608468164042&set=a.382416065149949.91134.382365111821711&type=3&theaterAnother good image of the Series-X - - https://www.facebook.com/photo.php?fbid=382424418482447&set=a.382416065149949.91134.382365111821711&type=3&theater
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Engineering TechnicianPulsar Controls Corp 1981 - 1983A true start up company. I personally constructed many of the lab benches, stocked the inventory, kitted assemblies, hand assembled and tested boards, packaged and shipped orders. First hourly employee hired. Wow that was fun.
Christopher Ott Skills
Christopher Ott Education Details
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Tennessee Technological UniversityElectrical Engineering
Frequently Asked Questions about Christopher Ott
What company does Christopher Ott work for?
Christopher Ott works for Cubic Mission Solutions / Gatr
What is Christopher Ott's role at the current company?
Christopher Ott's current role is A Principal level Hardware Engineer and System Architect.
What is Christopher Ott's email address?
Christopher Ott's email address is ch****@****ail.com
What is Christopher Ott's direct phone number?
Christopher Ott's direct phone number is +140865*****
What schools did Christopher Ott attend?
Christopher Ott attended Tennessee Technological University.
What are some of Christopher Ott's interests?
Christopher Ott has interest in Power Reduction, Signal Integrity, Network Hardware Design, Emi Prevention And Mitigation, Systems Architecture, Complex Systems.
What skills is Christopher Ott known for?
Christopher Ott has skills like Hardware Architecture, Fpga, Embedded Systems, Pcb Design, Debugging, Firmware, Hardware, Electronics, Microprocessors, Testing, Analog, Ethernet.
Who are Christopher Ott's colleagues?
Christopher Ott's colleagues are Xus Molina, Martha Ocadiz Rios, Sateesh Muserana, Robert Southgate, Julio Gotay, Jayson Shippy, Chuck. Richardson.
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