Created and managed RTL and Verification integration methodology for a small SoC team. Designednew IP-XACT and Python based flow for quickly building flexible SoC models to meet ever shiftingverification and emulation team needs using industry standard tools. Developed automated UVM testbench construction flow which scales and adapts based on RTL model constructed passing down top level configuration information to present IPs.Implemented post simulation task control scheme with highly configurable error processing flow.Created post-process checkers and coverage collectors with always-on checks as well as test-intentchecking based on database input from runtime monitors.Proof of Concept RTL design and verification for adapter to run side-band and DFT communicationson generic NoC. Specifically owned routing logic for moving packets onto Generic NoC and from oneNoC to another. Architected flow for NoC fabric generation and connectivity automation including analgorithmic generation of fabric routing tables and look-ups in the verification environment.Created Python generator for interface + adhoc based run-time configurable multiplexor allowingdynamic runtime switching between multiple BFMs or BFM and RTL.

Worked in Pre-Silicon Validation of Power Management IP in Intel Servers. Owned validation of Thermals and Digital Thermal Sensor, Telemetry, and PECI including development of feature test plans, OVM/UVM Test Bench suite (agenets, moniors, scoreboards, and coverage), and sequence/test case creation and failure debug. Worked with other IP teams to validate IP-to-IP interactions for Thermals and Telemetry as well as IP-to-Firmware interactions for all three areas involving firmware Assembly language level debug. Debugged test failures at IP and SoC level via log files and wave forms. Assisted in Post-SI debug and cause analysis.

MIC Validation Intern-Wrote RTLSI Checkers (C++/System Verilog)-Wrote targeted x86 assembly tests to validate new instructions and features-Validated subsets of the x86 Instruction set (vector, integer).

Electrical Engineering Intern in the Custom and Embedded Group-Thermal Testing on Outdoor Display models-EL Display test board design and layout-Fan control circuit for outdoor display design