Primarily working with optical transceiver design, high-sensitivity high-speed front-end IC's (Physical-layer) for fiber optic communications (POF in particular). Responsibilities start with working with a team to create new product ideas, technical discussions with clients to define products, continue with the architecture and circuit design and layout, right through design verification testing to final production support of the finished product. In a Principal IC designer role responsibilities include new product definition, product development, IC architecture and circuit design, layout, and design-for-test planning.Particular challenges of the role include pushing the physical bandwidth limits of the IC process and creating custom photodiodes unsupported by the foundry.Products include high-speed optical transceivers, with a focus on creating new IP (patents) and industry robustness, with particular focus on Electro-Magnetic Interference (EMI and EMC). Technical experience includes extensive top-level architecture design, sensitive analog front-end design, CMOS analog circuit design, high-speed signal conditioning (Ethernet), various high-performance amplifiers, power supply conditioning (high-speed LDOs, leadframe and LC component parasitic analysis), bandgap references, photodiode and RCLED characterization, high-speed comparators, and many more.Filed several patents on these technologies.Also, detailed mixed signal simulation and virtual test using analog simulation utilizing Verilog-A, and a general design-for-test approach allowing test-modes for simple and complete test coverage of the final silicon. I have a lot of experience with Cadence layout tools and usually do my own layout for sensitive circuitry, but I also have a lot of experience with hand-crafted layout for non P-cell circuitry, as well as general floor planning and toplevel layout hookup.

Worked with Analog Devices on my masters thesis with the University of Valencia developing an optical model of human tissue. The project was based around the technology of a wrist-worn heart-rate monitoring using light emission and reception. The goal of the project was to establish a means of evaluating various potential methods of making accurate measurements of the pulse in the wrist using PPG (light to measure heart-rate), such as varying the position of the sensor, the wavelength of the light, and consider means to combat the primary problem of movement signal noise.

Design team leader responsible for the development of Application Specific Integrated Circuits. Extensive experience in Amplifiers, Converters, Bandgap References, Oscillators, Circuit Layout for high precision matching, Low Power design for mobile technology, High voltage integrated design (DMOS >40V). MEMs actuators. Presented internal 'NBD' talks on high speed 'any-cap' ultra stable LDO's for use in chips without the need for external capacitors.

Internship