Connie Chen

Connie Chen Email and Phone Number

Graphics Hardware Engineer at Intel @ Intel Corporation
santa clara, california, united states
Connie Chen's Location
Canada, Canada
Connie Chen's Contact Details

Connie Chen work email

Connie Chen personal email

n/a
About Connie Chen

Highly skilled hardware validation engineer with experience in computer architecture, bringup, verification and debug of GPU and APU systems. Results driven, quick learner, accustomed to a fast paced, challenging environment. Seeking a lead role in the semiconductor industry to build on my previous experience.

Connie Chen's Current Company Details
Intel Corporation

Intel Corporation

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Graphics Hardware Engineer at Intel
santa clara, california, united states
Website:
intel.com
Employees:
133841
Connie Chen Work Experience Details
  • Intel Corporation
    Graphics Hardware Engineer
    Intel Corporation Nov 2018 - Present
    Toronto, Ontario, Canada
    -Post silicon validation lead for multiple domain teams, working on Intel’s discrete GPUs. Program lead for A580, Gunnir A770 and upcoming programs. -Issue triage and debug for any bugs found, using a combination of internal software and hardware tools. Investigated deltas on firmware/driver/OS stacks. Power and Performance -Characterized power parameters for at power and idle states, across silicon corners using a combination of software and hardware tools (including custom PCIe risers, DAQs, etc)-Provided feedback to tune power knobs with PNP design team to ensure optimal performance attainment for every SKU and product met CEC low power requirements -Implemented automation in Python with software developers to completely automate workload PNP measurements, saving hours of manual effort Thermal Mechanical/Product Features-Tested thermal protection features such as SOC/Memory/VR throttling and shutdown; worked with firmware teams to debug bugs found -Validated fan features during primary and secondary fan control as well as idle conditions-Stress tested functionality of product specific features such as debug hooks, LEDs, SPI flash, I2C3D Graphics -Manual and automated workloads in various stressful scenarios including thermal and voltage margining, long duration testing, monitor settings, pre/post ACPI, etc
  • Amd
    Ip Systems Engineer
    Amd May 2017 - Oct 2018
    Markham, Ontario, Canada
    -Led planning, verification, and debug for IOMMU IP (Input Output Memory Management Unit) as well as other northbridge IO hardware blocks.-Drove the coordination between hardware designers/architects, diagnostics engineers, and system validation engineers to ensure complete coverage of new and legacy hardware features.-Coordinated internal engineering development across multiple teams to align to customer schedule and escalate any gaps in resources to senior management.-Created unit level test plans and other documentation to transfer information to the engineering team/customer and streamline testing efficiency during bringup.-Full stack development of new automated test scripts in Ruby, used for preliminary validation and sanity check of crucial hardware features before chip boot.-Validated and verified hardware features during chip bringup; debugged, triaged, and root caused any potential hardware or software bugs to meet aggressive bringup schedules.-Provided thorough support and resolution for high priority customer issues throughout all phrases of the silicon development lifecycle. Nightly meetings with customers and internal teams in Asia.
  • Tesla
    Hardware Development Test And Analysis
    Tesla Aug 2016 - Dec 2016
    Palo Alto, California, United States
    -Carried out reliability testing for various Tesla Autopilot hardware, as well as board level failure analysis and validation-Designed test fixtures for boards, sensors, cameras, and other components to gather data on possible failures -Bringup and validation of HIL (Hardware In the Loop) testers-Designed circuit in Altium for interface board to reroute analog and digital signals from FPGA
  • Nvidia
    Post Silicon Validation
    Nvidia Jan 2016 - Apr 2016
    Santa Clara, California, United States
    -Participated in bringup and testing of NVIDIA Pascal chips through running experiments on multiple platforms-Used knowledge of graphics card architecture to characterize hardware across PVT corners
  • Abc Technologies
    Electrical Designer
    Abc Technologies May 2015 - Aug 2015
  • Tyco
    Hardware Designer
    Tyco Aug 2014 - Dec 2014

Connie Chen Skills

Troubleshooting Asic Oscilloscope Integrated Circuit Design Programming Soldering Autocad Teamwork Test Engineering

Connie Chen Education Details

Frequently Asked Questions about Connie Chen

What company does Connie Chen work for?

Connie Chen works for Intel Corporation

What is Connie Chen's role at the current company?

Connie Chen's current role is Graphics Hardware Engineer at Intel.

What is Connie Chen's email address?

Connie Chen's email address is co****@****tel.com

What schools did Connie Chen attend?

Connie Chen attended University Of Waterloo.

What skills is Connie Chen known for?

Connie Chen has skills like Troubleshooting, Asic, Oscilloscope, Integrated Circuit Design, Programming, Soldering, Autocad, Teamwork, Test Engineering.

Who are Connie Chen's colleagues?

Connie Chen's colleagues are Priya Kumari, Zhi Tong Lim, Steven Clark, Sujatha V., Joanne Wan, Lk Ong, Pmi-Pmp®, Lsscgb, Csqa, Sushma Chiluvuri.

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