Connie Chen Email & Phone Number

Toronto, Ontario, Canada

-Post silicon validation lead for multiple domain teams, working on Intel’s discrete GPUs. Program lead for A580, Gunnir A770 and upcoming programs. -Issue triage and debug for any bugs found, using a combination of internal software and hardware tools. Investigated deltas on firmware/driver/OS stacks. Power and Performance -Characterized power parameters for at power and idle states, across silicon corners using a combination of software and hardware tools (including custom PCIe risers, DAQs, etc)-Provided feedback to tune power knobs with PNP design team to ensure optimal performance attainment for every SKU and product met CEC low power requirements -Implemented automation in Python with software developers to completely automate workload PNP measurements, saving hours of manual effort Thermal Mechanical/Product Features-Tested thermal protection features such as SOC/Memory/VR throttling and shutdown; worked with firmware teams to debug bugs found -Validated fan features during primary and secondary fan control as well as idle conditions-Stress tested functionality of product specific features such as debug hooks, LEDs, SPI flash, I2C3D Graphics -Manual and automated workloads in various stressful scenarios including thermal and voltage margining, long duration testing, monitor settings, pre/post ACPI, etc

Markham, Ontario, Canada

-Led planning, verification, and debug for IOMMU IP (Input Output Memory Management Unit) as well as other northbridge IO hardware blocks.-Drove the coordination between hardware designers/architects, diagnostics engineers, and system validation engineers to ensure complete coverage of new and legacy hardware features.-Coordinated internal engineering development across multiple teams to align to customer schedule and escalate any gaps in resources to senior management.-Created unit level test plans and other documentation to transfer information to the engineering team/customer and streamline testing efficiency during bringup.-Full stack development of new automated test scripts in Ruby, used for preliminary validation and sanity check of crucial hardware features before chip boot.-Validated and verified hardware features during chip bringup; debugged, triaged, and root caused any potential hardware or software bugs to meet aggressive bringup schedules.-Provided thorough support and resolution for high priority customer issues throughout all phrases of the silicon development lifecycle. Nightly meetings with customers and internal teams in Asia.

Palo Alto, California, United States

-Carried out reliability testing for various Tesla Autopilot hardware, as well as board level failure analysis and validation-Designed test fixtures for boards, sensors, cameras, and other components to gather data on possible failures -Bringup and validation of HIL (Hardware In the Loop) testers-Designed circuit in Altium for interface board to reroute analog and digital signals from FPGA

Santa Clara, California, United States

-Participated in bringup and testing of NVIDIA Pascal chips through running experiments on multiple platforms-Used knowledge of graphics card architecture to characterize hardware across PVT corners