Curt Edwards work email
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Curt Edwards personal email
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Over 25 years experience developing mixed-signal semiconductor test solutions and transferring to production phase.
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Staff Test EngineerPsemi, A Murata CompanyPoway, Ca, Us -
Staff Test EngineerPsemi, A Murata Company 2017 - PresentSan Diego, Ca, Us -
Staff Test Development EngineerMaxlinear May 2015 - PresentCarlsbad, California, Us -
Sr. Staff Test EngEntropic Communications Aug 2010 - May 2015San Diego, Ca, UsMixing things up and fortunate to work with the RF test team here at Entropic. -
Test Engineering Section HeadTrident Microsystems Feb 2010 - Sep 2010Sunnyvale, Ca, Us- Coordinate activity of awesome ATE test team in new product test development - including sample, characterization and production test of high pin count Set-Top Box ASICs and transfer to volume production test.- Coordinate and Plan with test house for test time, equipment support and needed ATE configurationsStaff Engineer activities:- Interface with Design and Product Engineering to develop test plans for new productsDevelop test hardware & software on Verigy 93K PinScale ATEDebug scan and other DFT features in these ASICs -
Technical Lead - Test EngineeringNxp Semiconductors 2008 - Feb 2010Eindhoven, Noord-Brabant, NlCoordinate activity of ATE test team in new product test development - including sample, characterization and production test of high pin count Set-Top Box ASICs and transfer to volume production test and culminating with work on 45nm Apollo product.Staff Engineer activities:- Interface with Design and Product Engineering to develop test plans for new products- Develop test hardware & software on Agilent 93K- Debug scan and other DFT features in these ASICs- Use existing testbenches to develop simple Verilog test cases for vector generationAchievements:- Team Lead for TE group that successfully introduced new Set-Top Box chip to production maturity and transferred test to overseas test vendors.- Technical coordinator for successful change of local test house -
Test EngineerConexant 2000 - 2008Irvine, Ca, Us- Interface with Design and Product Engineering to develop test plans for new products- Develop test hardware & software on Agilent 93K and Teradyne Catalyst ATEs for mixed-signal ASIC's- Debug scan and other DFT features in these ASICs- Use existing testbenches to develop simple Verilog test cases for vector generation- Transfer test solution to production and support production issuesAchievements:- Characterized input and output timing parameters for DDR2 interfaces with Verigy 93K- Member of team that brought several Set-Top Box chips to production maturity and transferred test to overseas test vendors.- Researched and coordinated on-site training for Verigy 93K- Successfully mentored student intern from initial script writing project to support of test program -
Senior Test EngineerIbm Microelectronics Nov 1998 - Jan 2000- CommQuest acquired by IBM Microelectronics - Developed test software and hardware for IMS and Teradyne ATEs, for characterization of satellite modem chips - mostly digital with some DACs and ADCsInterfaced with Design Engineering to convert simulations to ATE vectorsPrepared test solutions for manufacturing on-site and off-siteContributed to standardized test software library for reduced test development cycle
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Test EngineerCommquest Nov 1997 - 1998Developed test software and hardware for IMS for characterization of satellite demod chip - mostly digital with some DACs and ADCsInterfaced with Design Engineering to convert simulations to ATE vectors
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Senior Test & Product EngineerSt Microelectronics Jan 1994 - Oct 1997Geneva, Switzerland, ChCoordinated engineering interface between Design, Product/Test Engineering and Manufacturing for new telecom productsAnalyzed new silicon performance with Design EngineeringCreated test solutions on several ATE platforms to optimize utilization and deliveryTransferred and qualified automatic test generation software -
Senior Test EngineerNortel Networks Jan 1989 - Jan 1994CaEngineered major volume devices through high ramp periods (150K/month to 525K/month) at multiple test sites, resulting in on-time customer deliverySustained test solutions for telecom codecs on Teradyne A500 and Credence ATEsActive member of self-managed team within engineering and production -
Equipment Engineer / Lead Test Production TechnicianNorthern Telecom - Seg Jan 1983 - Jan 1989Implemented SPC for in-house ATE, resulting in reduced DPM and increased productivityImplemented technician training on ATEs and device handling equipmentResolved engineering equipment issuesMaintained ATEs, handlers and probers from multiple vendors
Curt Edwards Skills
Curt Edwards Education Details
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Uc San DiegoElectrical And Electronics Engineering -
Devry UniversityElectronics
Frequently Asked Questions about Curt Edwards
What company does Curt Edwards work for?
Curt Edwards works for Psemi, A Murata Company
What is Curt Edwards's role at the current company?
Curt Edwards's current role is Staff Test Engineer.
What is Curt Edwards's email address?
Curt Edwards's email address is ce****@****ear.com
What schools did Curt Edwards attend?
Curt Edwards attended Uc San Diego, Devry University.
What skills is Curt Edwards known for?
Curt Edwards has skills like Test Engineering, Mixed Signal, Semiconductors, Dft, Rf.
Who are Curt Edwards's colleagues?
Curt Edwards's colleagues are Zhaojin Wen, Yuji Mitsui, Matt Anctil, Fernando Campillo, Vinay Kumar P., Lukas Tan, Valerie Good-Dunn.
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