Damon J. Smith Email & Phone Number

Python Programming & Scripting – Created automation scripts to streamline design processes and improve data processing efficiency, contributing to project cost-effectiveness and precision.AI and Cloud Architecture – Designed scalable AI solutions on AWS and Azure platforms to support data-driven insights, leveraging advanced cloud computing methods.iOS App Development & Swift Programming – Built a streaming application in Xcode using Swift, enabling video recording and live hosting functionalities for athletic competitions and training.

Santa Clara, California, Us

As a Solution Architect, I bring a blend of expertise across cloud technologies, data architecture, and system integrations. With deep proficiency in object-oriented programming (Python), I am skilled in building robust, scalable solutions. My experience with AWS (DynamoDB, Sagemaker, Lambda, S3, EC2) and Azure enables me to design and deploy cloud-native applications that harness the full potential of the cloud. I have a strong command of SQL for managing and optimizing complex datasets, and hands-on experience in ETL/ELT processes for seamless data extraction and transformation.My background in DevOps (Git, GitHub), Agile methodologies, and extensive work in Unix/Linux ensures that my solutions are reliable, agile, and easy to deploy. I am also experienced with Big Data tools such as Spark , essential for data-intensive projects. My skills empower me to troubleshoot complex issues, communicate effectively, and drive impactful, data-driven results.

• Led startup software and product development efforts, sourcing manufacturing pipelines in APAC.• Built and managed an Amazon sales business, producing several best-selling products.• Successfully launched and maintained a top-ranked career coach iOS application for 2 years.

Santa Clara, California, Us

Worked on or lead 45 Designs on .18um .13um 90nm 65nm 45nm 32nm 22nm and 14nm Intel Process Technology.10+ years of solid, in-depth experience in mask design. Background in custom digital, SRAM, and mixed-signal layout. Excellent knowledge of inputs and parameters associated with digital and analog design 14nm SATA(Serial) & MEMORY IP owning all activities from custom layout, place, and route, verification(lvs, DRC, density & Reliability Validation responsibilities. Tools: Gate Ensemble, Silicon Ensemble, Apollo, Cadence Tools, Ciranova HELIX, TotemRV, and great in-depth working knowledge of drc/lvs verification, Synchronicity Library Manager, and Calibre Verification tools. Also Intel internal toolsManagement: Staffing, Scheduling, and project management duties. Use of Microsoft Office tool suiteAwards: 2010 Department Impact Award: Enabling Sodaville & Groverland, Intels Atom SOC's for Digital Home 2007 Department Impact Award - Delivering v12 Libarary physical designs for IronLake on P1266

Santa Clara, California, Us

Technology Expert: One of few experts in all IP dev phases from front-end design to GDSII, including automation, standard cell libraries, auto place and route, physical design verification and foundry process related issues (yield) . Deep Process Experience: Led over 20 tape-outs at technology nodes (45nm, 32nm, 22nm, 14nm, 10nm), overseeing layout design ownership and ensuring compliance with DRC, LVS, ERC, and Design for Manufacturability standards.

Santa Clara, California, Us

• Led the layout design of over 20 tapeouts at Intel Corporation, utilizing Silicon Ensemble and other Cadence tools.• Implemented DRC, LVS, ERC, and Design for Manufacturability methodologies for successful chip designs.• Collaborated with cross-functional teams to ensure efficient Auto Place and Route processes.

Graduated, Artificial Intelligence: Implications For Business Strategy

Mis, Computer Science

B.S. Cis, Computer Information Systems