Dan Dina's Location
Melbourne, Florida, United States, United States
Dan Dina's Contact Details
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About Dan Dina
Creative Engineering Development Leader with wide Industry Experience designing and managing projects in Laser Jet Printers, Computing Platforms, Medical Devices, Communication Systems, Image Processing, and Embedded Design.Knowledgeable of all standard Communication and Control technologies, and capable of Architecting and delivering World Class Leading Edge Products.
Dan Dina Work Experience Details
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Ceo And Cto Best Lidar CorporationBestlidar Feb 2021 - PresentMelbourne, Florida, UsCEO of startup working on Design and Manufacturing (in the USA) of the world's best LIDAR sensor.Together with a small team of Engineers and Scientists we're attempting to create the first Solid State Lidar capable of performance specs typical of mechanically scanned systems, but with much lower power consumption, lower weight and smaller size.Assembling team of 40+ Engineers and Scientists, patenting technology ideas, and working on creating prototypes of our Solid State IP. -
Sr. Director Electrical Systems DesignLuminar Technologies Jan 2018 - Jan 2021Senior R&D Director responsible for Delivery of Hardware and Firmware solutions enabling the Luminar LIDAR systems. Led two highly technical Engineering teams in the Development of Electrical Circuits, and Embedded code that implemented the LIDAR sensor's controls and Image processing. Together with Engineering Mangers and Key Technical Experts on my team, worked to hire, train and build the most effective Engineering team at Luminar capable of world class design and execution.The Electrical Systems comprised of controllers for the Laser module, receiver electronics, power circuits, mechanical actuators along with compute circuits implemented in FPGA and microprocessors, DDR3 memory and gigabit ethernet.Led teams of Managers and Engineers through development of the Model H, and Model I systems.Model H was one of the first LIDAR prototype targeting larger volumes and simplified architecture, and mechanical dimensions, while Model I was slated for the Automotive Market.Led Engineering teams in the Architecture definition of Model I (IRIS). Drove IRIS Architecture requirements to satisfy stringent Automotive level design quality and process, including all necessary Certifications and Functional Safety requirements and Worst Case Circuit Analysis. The Hardware Architecture targeted reduction of components along with lowest BOM cost, both of which were accomplished in order to reduce total system cost of the IRIS model to $1,000/unit. Lead the FW team Mangers and Tech Leads to Implement Architectures allowing implementation of AUTOSAR and full Functional Safety support for the hardware. Worked with cross functional teams, in Mechanical , Laser, Receiver and Optics to ensure the Electrical System Design integrated and provided best in class support for other KPIs in the R&D organization.Hired External Contractors, and negotiated contracts with vendors to ensure MFG capacity along with high quality standards. -
Vp EngineeringBest Circuits Inc Mar 2014 - Jan 2018Melbourne, Fl, UsManaged Engineering Efforts in advanced R&D of Machine Vision Systems, Artificial Intelligence (Learning Systems) , Wireless Networking Devices, Advanced Power conversion Technologies, and Low Power High Availability Computing Systems.Leading Hardware and Firmware R&D teams in Technologies that enable Autonomous Driving Vehicle sensor development, High Performance Computation boards, Industrial Controllers, and Wireless Communication Devices. -
Senior Research AssociateItw Tech Center Jan 2011 - Feb 2014Led Engineering Research into advanced technologies for multiple ITW Business Units. Assisted by other Tech Center and Business Unit Engineers and Scientists have developed dedicated Video Processing hardware needed to implement commercially feasible, high accuracy Optical Measurement Systems. Worked with Firmware/Software Engineers to design and test Image Processing algorithms implemented in FPGA. Worked with third party vendors to source Critical Components and IP for the system. Managed Vendor relationships to guarantee long term support for critical system components. Performed system design incorporating leading edge technologies in both Hardware and Software areas. Championed Technology benefits, competitive advantage, reduced cost and delivery targets and obtained approval for project from Senior Management, and Group Vice Presidents. Created R&D budgets and worked with management to allocate resources to ensure timely product delivery.Architected Zigbee Wireless Communication System to be used to control Industrial equipment, and transfer low bandwidth video and audio between Accessory nodes. Led development team in all aspects of R&D, Proof of Concept Prototyping and test of system performance. Published extensive documentation describing Wireless Architecture, and filed multiple patents describing the unique aspects of the Architecture. Have been responsible for Technology Research and Evaluation in support of ITW Corporate Business Objectives. Have been routinely called upon to advise Senior Company Management of Technology relevance of Investment opportunities leading to business acquisitions.
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Senior Engineer/Hardware ArchitectGoogle Aug 2011 - Nov 2011Mountain View, Ca, UsManaged development of the Design of Computing platforms and Safety Embedded Systems for the Autonomous Vehicle Research Project.Provided Architectural leadership of Hardware Platforms implementing high performance Intel i7 processors and embedded redundant processing platforms based on Windows 7 Operating System. Worked on definition of Dual-Dual Safety Critical Computing architectures to meet the highest safety and reliability requirements of the Autonomous Vehicle Project.Architected hardware of high reliability, and high availability power conditioning and distribution systems to guarantee failsafe operation of Autonomous Vehicle Control System. -
Senior Design EngineerTrading Technologies Apr 2009 - Nov 2010Chicago, Illinois, UsTasked with defining the hardware components and infrastructure necessary to implement Trading Technologies Cloud Computing platform, in order to transition the company’s computing platforms to the next generation. The new cloud computer should reduce connection latency, greatly improve hardware utilization and provide “infinite” bandwidth and failover capacity for all of the company’s time critical financial transactions.Designed FPGA logic implementing the FIX protocol which used hardware to accelerate the translation of financial data to and from Financial Exchanges using 10 Gigabit Ethernet links and embedded IP filtering algorithms in order to reduce unnecessary packet processing and speed up the entire process by 100X.Co-Designed high end intelligent router for use in the Financial Industry. The router utilized a 16 core Network processor, DDR2 memory and dedicated Gigabit Ethernet Hardware to handle and route IP packets through company’s trading gateways. -
Principal Design EngineerHaemonetics Mar 2007 - Apr 2009Boston, Ma, UsPrincipal Design Engineer – Haemonetics Inc., Chicago, IL.Architected and designed Embedded Controllers for medical equipment. Lead Design efforts in the Hardware Development of Haemonetics Blood Collection machine, defining Electromechanical components and processes necessary for low cost, medium volume, safe and easy to use product.Designed digital control logic and busses, Redundant safety processor logic, Synchronous motor controllers, precision analog circuits for weight, pressure and fluid flow measurements, wireless communication links, GPS circuitry, battery control, and LCD interface circuits. Designed embedded controllers for control of 3, 5, and 10W Fiber laser devices using ARM7 processor. The hardware controller provided safe and accurate digital control over a CO2 laser used to create Holograms in the company’s "Optical Tweezer" manipulation device.Designed micro fluidics controller using micro solenoids which allowed precise metering and monitoring of blood and processing reagents. Architected control and communication scheme to allow maximum flexibility and easy user interface to the controller hardware. -
Signal Integrity Design ConsultantDan Dina Consulting Sep 2005 - Mar 2007Assisted various Corporate clients with Signal Integrity consultation, FPGA logic design, sensor circuit design, and architecture of embedded processing systems. Technologies implemented are x86 chipsets, Xilinx FPGAs, 32 bit processors, DDR2 memory buses, PCI, and PCI-EX interfaces, and various 32 bit embedded processors. Typical work performed as follows:Designed intelligent LED driver controller that utilized Zigbee wireless communication standards to connect in mesh networks with other such devices. Controller was designed with intelligence to monitor the life of the LED devices and other vital parameters necessary for fixture longevity. Work resulted in several patentable ideas one of which is currently pursued by the Customer.Designed optical paper sensors for large Corporate Client specializing in thermal on demand printing. Performed initial design and fully tested and characterized sensor design. Documented all aspects of design and engineering tradeoffs.Designed board layout for low cost embedded processing unit, resulting in low layer count, low power, and low radiated emissions of PCB. Design passed all functional and regulatory testing at first revision.Designed high performance, low cost switching power regulators for high volume production.Developed VHDL code for Xilinx Virtex4 FPGAs including a PCI local bus controller and DMA engine, memory interface to DDR2 bus, Power PC processor core, and sophisticated logic to support user GUI through the PCI bus.Performed Signal Integrity analysis on customer’s embedded designed and defined Layout rules for Client's Engineering team.Performed simulations on PCIe interface for Corporate Client interested in implementation of bus for High Performance Personal Computer video applications.Performed system and board level design for Clients working with NTSC and PAL video applications.
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Senior Design EngineerHp Aug 1988 - Sep 2005Palo Alto, Ca, UsWorked with team to design x86 based color LJ printer “formatter” boards to power the next generation of high speed high volume color printers. Worked with Taiwanese ODM to implement and test the design. Managed all Engineering related to successful delivery of product level boards which were integrated into LaserJet printers.Architected image processing blocks for printer formatting system as well as sensors and user interface blocks. Designed low power high performance Pentium Mobile based boards to use as controller and graphics formatter for the printer system. Architected all power save hardware and worked with firmware engineers to implement into HP’s proprietary Operating System.Worked with Optical scanners and paper handling devices as part of system integration design of large Multifunction Print systems.Coordinated regulatory testing of hardware and made necessary modifications to circuits for full compliance with all emission and safety regulations.Contributed to PCI-EX SIG as member for PCI-EX Cabled group representing Hewlett Packard. -
Senior Hardware Design EngineerMicron Technology Aug 1999 - Feb 2003Boise, Idaho, UsDesigned computer motherboards to showcase Micron’s latest memory technology. Implemented first Micron Unbuffered Double Data Rate memory bus allowing data transfers at 266 MT/s. Performed all signal integrity and EMI analysis needed for successful development of product.Provided design expertise to other groups within Micron. Designed motherboard circuits for Intel Front Side Bus, PCI, IDE and AGP interfaces. Worked on design of Athlon processor system utilizing DDR memory bus implemented in a Micron chipset. Wrote external reference design guide for Micron’s Copperhead and Coppertail chipsets and performed all necessary engineering to ensure high performance operation of motherboards. Wrote white papers on high-speed design techniques and principles and trained new engineers on the use of simulation tools and analysis.
Dan Dina Skills
Product Development
Testing
Embedded Systems
Software Design
System Architecture
Software Development
Software Engineering
Integration
Agile Methodologies
Wireless
Fpga
Pcb Design
Manufacturing
Systems Engineering
Product Management
Linux
Mobile Devices
Cloud Computing
Software Project Management
Unix
Uml
Simulations
Firmware
Hardware Architecture
Field Programmable Gate Arrays
Java
Vhdl
Engineering
R&d
Project Management
Operating Systems
Cross Functional Team Leadership
Algorithms
Research And Development
Dan Dina Education Details
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Columbia UniversityArtificial Intelligence -
Univeristy Of IdahoElectrical And Electronics Engineering
Frequently Asked Questions about Dan Dina
What company does Dan Dina work for?
Dan Dina works for Bestlidar
What is Dan Dina's role at the current company?
Dan Dina's current role is CEO/CTO Best Lidar Corporation.
What is Dan Dina's email address?
Dan Dina's email address is dd****@****its.com
What is Dan Dina's direct phone number?
Dan Dina's direct phone number is +184755*****
What schools did Dan Dina attend?
Dan Dina attended Columbia University, Univeristy Of Idaho.
What skills is Dan Dina known for?
Dan Dina has skills like Product Development, Testing, Embedded Systems, Software Design, System Architecture, Software Development, Software Engineering, Integration, Agile Methodologies, Wireless, Fpga, Pcb Design.
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