Daniel Beckmeier Email and Phone Number
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Daniel Beckmeier personal email
I am an electrical engineer with a background in physics working in reliability for 11 years. I started with organics FETs followed by memories, my current focus is semiconductor reliability and development. I currently work on silicon and PCBA reliability for self-driving cars at Cruise in San Francisco, California.
Astranis Space Technologies
View- Website:
- astranis.com
- Employees:
- 447
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Astranis Space TechnologiesSan Francisco, California, United States
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Staff Silicon Reliability EngineerCruise Nov 2023 - PresentSan Francisco, California, Us• Facilitate DFMEA and develop DfR design rules during the early chip design phase.• Develop silicon chip package level and board level testing plans to assess and validate Cruise in-house silicon chips and third-party chips for Cruise AV applications.• For validation tests at Cruise lab and local facilities, own test preparation, authorize test standard operating procedures (SOP), design test setup, and work with technicians to execute/oversee test executions.• For validation tests at vendors, work with vendor reliability engineers to develop proper test plans, review/audit supplier test setup, and drive supplier execution.• Analyze test data and collaborate with cross-functional teams on failure root cause analysis and develop proper mitigations. • Collaborate with other Cruise reliability engineers on compute level and other module level testing.• Participate in design reviews to ensure past lessons learned and best practices are incorporated.• Participate or lead DFMEA through the entire product development cycle for chip failure modes and effect identifications, detections, and preventions. -
Cmos Nand Reliability R&D EngineerIntel Corporation Jan 2022 - Nov 2023Santa Clara, California, Us• Characterizing CMOS device and interconnect FEOL and BEOL reliability.• Working in conjunction with process integration and technology developmentengineers to provide reliability feedback during technology development. • Supporting intrinsic device and interconnect level qualification.• Working closely with Design Engineering to enhance aging models for key analog anddigital circuits, develop methods for validating analog and digital circuit degradation,SOA checking to enhance built-in reliability.• Developing new acceleration techniques, test methods and analytical tools to providefast and effective feedback for process, product, and test optimization on reliabilityissues• Determining reliability requirements and technology targets of components toachieve company, customer, and other reliability objectives.• Influencing design, process, product, test, and/or system solutions to enable aggressive scaling of Intel's NVM technologies• Working in cross-functional and cross-company groups of engineers on multi-disciplinary technical projects to solve complex reliability issuesduring technology development and ramp to high-volume manufacturing.• Working with reliability lab technicians for data collection and analysis. -
Principal Semiconductor Reliability EngineerOnsemi Sep 2019 - Dec 2021Scottsdale, Arizona, Us• Reliability characterization of Front End of Line (FEOL) devices, BEOL, and materials• Working with process and technology development teams to assess FEOL reliability of new semiconductor processes• Reliability swim lane owner for an advanced BCD (Bipolar,CMOS,DMOS) technology• Ownership of PID test structures, test plans, analysis, and design rules• Design and implementation of test structures for reliability characterization, including layout in Cadence environment• Designing, building, and maintaining test systems for reliability measurements• Developing robust and efficient data analysis flows for raw data and report generation, archiving, and recall• Working on PID and fWLR standards in JEDEC task groups -
Staff Engineer Technology Reliability MonitoringInfineon Technologies Jan 2018 - Sep 2019Neubiberg, München, De• Fast Wafer Level Reliability Monitoring implementations in semiconductor fabs and foundries• Interface for technology reliability monitoring for foundries and one internal fab• Plasma Induced Damage (PID) technology reliability qualifications• Methodology development for PID monitoring• Antenna design rule definition for semiconductor products to prevent charging damage during production• Training of internal and external experts on CMOS reliability• Lead of internal teams for technology qualification -
Technology Reliability Monitoring EngineerInfineon Technologies Apr 2013 - Sep 2019Neubiberg, München, De• Technology reliability qualifications for plasma process induced damage (PID)• Implementation of wafer-level reliability monitoring in fabs and foundries• Methodology development for reliability monitoring and PID
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Research Associate / Phd StudentBundeswehr University Munich Aug 2008 - Mar 2013Neubiberg, Bavaria, De• Development of a semiconductor memory based on fullerenes (planning, processing and electrical characterization)• Analytics (STM, AFM, REM, FTIR)• Holding student tutorials and practicals• Supervision of diploma students
Daniel Beckmeier Skills
Daniel Beckmeier Education Details
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Bundeswehr University MunichElectrical Engineering / Semiconductors -
Ludwig-Maximilians-Universität MünchenPhysics
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Queen'S University BelfastPhysics
Frequently Asked Questions about Daniel Beckmeier
What company does Daniel Beckmeier work for?
Daniel Beckmeier works for Astranis Space Technologies
What is Daniel Beckmeier's role at the current company?
Daniel Beckmeier's current role is Staff Silicon Reliability Engineer.
What is Daniel Beckmeier's email address?
Daniel Beckmeier's email address is da****@****emi.com
What schools did Daniel Beckmeier attend?
Daniel Beckmeier attended Bundeswehr University Munich, Ludwig-Maximilians-Universität München, Queen's University Belfast.
What are some of Daniel Beckmeier's interests?
Daniel Beckmeier has interest in Science And Technology, Education.
What skills is Daniel Beckmeier known for?
Daniel Beckmeier has skills like Halbleiter, Semiconductors, Reliability Monitoring, R&d, Solid State Physics, Semiconductor Device, Electrical Engineering, Semiconductor Fabrication, Device Characterization, Originlab, Afm, Rasterkraftmikroskop.
Who are Daniel Beckmeier's colleagues?
Daniel Beckmeier's colleagues are Aidan Rickert, Amy Marin, Rick C., Ryan Stark, Chang Li, Jenya Pryadkin, Stephen Spears.
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