Berkeley Neuromorphic extends prior engineering and research at the University of California and Lawrence Berkeley National Lab. There is a secondary emerging focus on high-agility FPGA compute local-cloud approaches for application-specific acceleration such as HFT and other (under NDA).

Manager of the Computer Architecture Lab operated jointly with Sandia National Lab. Tasked with exploration and evaluation of emerging computing technologies for future supercomputing (primarily the Exascale Computing Initiative) such as quantum and neuromorphic (specifically). Platforms included IBM Research TrueNorth (in coordination with Lawrence Livermore National Lab) other gov't agencies) and demonstrated functional prototype with Intel 7th gen coprocessor/SyNAPSE chip at Supercomputing 2015. Evaluated multiple "thin core" processors under full-stack HPC environment: RISC-V (32-64), IBM (PPC), ARM (M0, A7, A9), RISC-V cores, embedded Linux, ASIC evaluation for power and area, HMC and HBM memory technology incorporation and functional testing for energy characterization under HPC workloads.

Research support for computer architecture and ASIC emulation and verification on FPGAs. Completed BEE2-based 1008-core full emulation system including Linux stack operating full NASA parallel benchmark suite. Also engaged in systems biology "brute force" acceleration task, served as project manager of open source RISC-V architecture project, ASIC lab bringup in support of V1 and V2 RISC-V early silicon prototypes.Developed and managed collaborative systems biology computational project for brute-force systems biology using custom HW with Nolan Lab at Stanford. Spin off Bina Technologies (now Roche).An allied effort explored massive parallelism on advanced substrates for 2.5D integration of future memory technologies (generally high-bandwidth, high-stack 3D devices).

Computer architecture and embedded OS development (Linux). First open-source port of full Linux (Red Hat) to Virtex II-Pro (IBM PPC405gp) including BSP. Integrated under Xilinx EDK/SDK. Developed kernel support for integral acceleration support and direct processor access in protected mode via cache bus. Demonstrated 42X performance benefit under open-source desktop environment. Automated task profiling for acceleration targeting.Authored numerous successful proposals for accelerated computing including 512 node deployed system, building-scale integrations, and finalist for original DESCHAL RSA challenge.

Department of Energy: High-speed, low-noise analog and digital scientific instrumentation. Managed research lab of 7 employees and volume production (<400 unit) and transition to miniaturized SMT environment and testing. Designed and implemented non-linear discrimination apparatus for large-scale physics experiment and automated bring-up, test suite, and tracking of field units. Malleable detector trigger systems for low-level (single photon) optical sensor (10,000+) inputs.Designed and integrated enterprise class down-hole servers for use at CERN Large Hadron Collider, and designed monitoring instrumentation for LIGO (Nobel Prize 2017) under direct supervision of Barry Barish.NASA: While at Caltech Space Radiation Laboratory, performed experiment instrumentation and ground support design for spacecraft and high-altitude balloon borne experiments (130K feet, 4K pounds) including GRIP, HEIST, SAMPEX, Voyager, including launches, JPL control, and field campaign launch and recovery.

Interior Communications Specialist, Reactor Operator, OPM 0840 Nuclear Engineering. Security Clearance: TS/SCI [Q-Level equivalent]