Daniel Lorek Email and Phone Number
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A team-oriented and highly motivated Engineer with 20+ years direct experience in RF/mixed signal testing in ATE, PXI, and Rack and Stack environments. Energetic self-starter with excellent analytical, organizational, and creative skills. Certified LabVIEW Developer (CLD) - 08/2014
Amazon
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- amazon.com
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Sr. Payload Integration And Test Communications System EngineerAmazonRedmond, Wa, Us -
Sr. Payload Integration & Test Communications System EngineerAmazon Nov 2022 - PresentSeattle, Wa, Us -
Rf System Integration And Validation EngineerApple Dec 2019 - Aug 2022Cupertino, California, UsApple acquired Intel's smartphone modem business unit in 2019. -
Rf System Integration And Validation EngineerIntel Corporation Nov 2014 - Dec 2019Santa Clara, California, UsResponsible for the bring-up, verification, and debugging of RF subsystems in 4G/5G NR modem applications consisting of RF Transceivers, Power Management, and PAs. This required coordinated debugging efforts with cross functional teams such as System Engineering, Firmware, System Integration, Baseband, and external customers. Experienced with providing on-site support for both customer and vendors for FW/HW optimizations, tooling, and debugging. To accomplish these tasks, automation and simulation was performed with MATLAB and LABVIEW with common RF lab equipment as well as with communication testers (CMW500) and National Instrument’s PXI instrumentation (VST). -
Senior Rf Test Automation EngineerTriquint Semiconductor (Now Qorvo, Inc.) Nov 2011 - Oct 2014Hillsboro, Or, UsTasked with supporting TriQuint’s worldwide Applications Engineering group for the Mobile Devices Business Unit. This included the test and characterization of high frequency modules (PAs, switches, and passives) for the mobile communications market including GSM/EDGE, CDMA, LTE, and WLAN products. Responsible for the development of tools to control and communicate with TriQuint’s products that were also provided to customers. Involved with the creation of TriQuint’s Envelope Tracking (ET) testing solution. This role required a familiarity of many software languages such as LabVIEW, TestStand, C/C++, and VBA as well as the ability to utilize typical RF bench equipment, automated load pull tuners, and PXI instrumentation. -
Senior Rf Test Engineer (Contractor)Tektronix Jan 2011 - Nov 2011Beaverton, Or, UsAs a member of the New Product Introduction Team, I was responsible for creating both hardware and software for the characterization and production testing of Tektronix’s next generation Real Time Spectrum Analyzers operating up to 20GHz utilizing National Instruments’ TestStand test management software along with LabVIEW's graphical programming environment. -
Senior Test EngineerSemtech Jan 2010 - Apr 2010Camarillo, Ca, UsDesigned, developed, and documented test procedures for the testing of high speed 10/40 Gb/s SERDES devices from a product design phase through production.Debugged and resolved real-time manufacturing, customer return, and design application issues as required.Consistently communicated technical product status to management and ensured product quality meets or exceeds customer expectations. -
Senior Test EngineerSierra Monolithics Apr 2009 - Jan 2010UsSierra Monolithics was acquired by Semtech in January, 2010. -
Senior Test EngineerStaccato Communications Nov 2006 - Apr 2009UsWorked closely with Design Engineering to create a solution to fully characterize Staccato’s single-chip 65nm CMOS Ultra-Wideband (3-10GHz) SOC across PVT utilizing Rack and Stack equipment and Teradyne’s Integraflex ATE software (VB) running in offline mode. This allowed the seamless transition of the device to the tester platform for large-scale characterization and production as well as a significant cost savings during the initial debug stages. Assisted with the creation of ATPG vectors utilizing design tools such as Cadence Encounter and converted these to tester-native pattern format for adequate digital coverage. -
Senior Support EngineerQualcomm Cdma Technologies Mar 2004 - Nov 2006San Diego, Ca, UsResponsible for the development and on-time release of multi-site RFIC production solutions on the Teradyne IntegraFlex ATE for CDMA transmitter and a CDMA/GSM transceiver. This included DIB design, software development, and successful correlation and transfer to offshore test facilities in Asia.Qualcomm’s first RF ATE Engineer chosen to be trained on the IntegraFlex platform. This resulted in being the liaison between Qualcomm and Teradyne for the IntegraFlex ATE platform. Introduced new multi-site DIB design for RF products at Qualcomm utilizing a motherboard/daughtercard approach for producibility.Provided DFT (Design for Test) feedback to Design Engineering during the early stages of a product design. Selected as the Lead Test Engineer for the development of a CDMA transceiver with GPS. -
Test EngineerRf Magic Inc. Jun 2002 - Mar 2004UsDesigned hardware and software for the characterization and production testing of RFIC semiconductor products for markets including consumer broadband wireless, digital terrestrial and satellite TV on the Agilent 84000 tester.Created lab ATE software to characterize multiple devices using LabView and common RF lab equipment programmed via GPIB/USB/LAN.Worked closely with design and system engineers to understand product performance and yield signatures. -
Test EngineerEnsemble Communications Jun 1999 - Jun 2002Designed Agilent (HP) VEE and Visual Basic based control and test software for the characterization of high frequency (24 GHz to 40 GHz) LMDS radios. Data collected was presented in Excel and stored in Access via ActiveX Automation.Designed and debugged RF hardware for LMDS radios. Made component changes to and troubleshot circuitry including amplification stages, voltage variable attenuators, microprocessors, and PLL circuits.Collected data for and assisted in preparation of document packages for regulatory submissions including FCC and ETSI.Interacted with multiple vendors to improve quality of product by identifying repeat failure mechanisms and design issues.
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Technician SpecialistRemec Microwave Inc. Jan 1997 - Jun 1999UsTested, tuned, troubleshot, and made modifications to: amplifiers, up/down converters, multipliers, switches, and numerous other RF/Microwave components. Performed common measurements such as IP3, noise figure, and phase noise on a daily basis.Created documentation on procedures for testing, tuning, and debugging hardware so that it could be effectively transferred to a production environment after engineering optimization.In charge of the lab’s Self Evaluation Team ensuring proper processes and procedures were used by approximately twenty technicians and assemblers. Held a Department of Defense secret security clearance.
Daniel Lorek Skills
Daniel Lorek Education Details
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Itt Technical InstituteElectronics Engineering Technology
Frequently Asked Questions about Daniel Lorek
What company does Daniel Lorek work for?
Daniel Lorek works for Amazon
What is Daniel Lorek's role at the current company?
Daniel Lorek's current role is Sr. Payload Integration and Test Communications System Engineer.
What is Daniel Lorek's email address?
Daniel Lorek's email address is da****@****ail.com
What schools did Daniel Lorek attend?
Daniel Lorek attended Itt Technical Institute.
What skills is Daniel Lorek known for?
Daniel Lorek has skills like Rf, Ic, Semiconductors, Mixed Signal, Analog, Test Engineering, Spectrum Analyzer, Debugging, Testing, Bluetooth, Soc, Analog Circuit Design.
Who are Daniel Lorek's colleagues?
Daniel Lorek's colleagues are Nahna Noushad, Bala Krishna M, Parjanya Yerabati, Aaron Pinnock, Fatima Reyes, Abhishek Singh Rajawat, Keandrea Palm.
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