Dan Bethke Email & Phone Number

Retired and loving it. I wouldn't say I'd never go back to work, but not looking for a position at this point.

Managing business and technical needs of accounts in Canada and the Eastern US.

• Technical Sales for Engineering Design Automation company. Supporting Integrated Circuit design and analysis tools from front end concept level to back end physical layout and verification. Ability to drive business.
• Work with customer to identify areas where Mentor Graphics Corp. (MGC) tools and services could improve their design flow.
• Develop detailed tool configurations and business models based on customer needs, then work with the customer to come to a mutual agreement on the business arrangement. This included interaction with the customer from.
• Work with MGC product groups to improve technical capabilities and marketing value propositions.
• Technical support of tools in the following areas: Digital – RTL design, synthesis, simulation.and static timing; Analog – capture, simulation, layout, DRC, LVS, extraction, ERC, and Design For Manufacturing.

• As Training Coordinator develop, organize and deliver Mentor Graphics-based digital and statistical design methodology training throughout AlliedSignal
• Developed Web pages to communicate training descriptions, links, schedules and other EDA issues to AlliedSignal employees
• Supported CAD/CAE tools as CAE Technology Leader from forecast through purchase, installation, maintenance, training and technical aid to users
• Researched and evaluated potential CAE tools with objective of solving existing tool problems and reducing design cycle times
• Managed Engineering Design Automation (EDA) SW to reduce yearly maintenance costs by approximately 33%
• Successfully implemented VHDL Vital/SDF design methodology resulting in a 50% cycle time reduction for FPGA

• Successfully retargeted existing design to a 40K gate, 1.2 µ VLSIC utilizing Mentor Graphics tools for schematic capture, verification and layout.
• Designed 132 pin VLSIC for use in an electronic aircraft identification system. The VLSIC provided control and accumulated built in test information to a MIL-STD-1750 µP.
• Derived the VLSIC design specification document from a PWA level specification.
• Utilized CRC error detection and scan path technology in VLSIC.

• Co-designed and debugged MC68000 Master/MC68030 Slave processor board hardware for 150 MFLOP Array Processor. Work closely with software engineers during MC68000/MC68030 code debugging using a PC based MC68030 emulator.
• Designed 20 board multiwire backpanel bus that utilizes 3 arithmetic processors and 2 control processors. Provided support in mechanical design of the chassis' EMI shielding, cooling and power supply. Worked with.
• Debugged MC68020 based VME Bus adapter board.
• Debugged systems employing parallel pipeline architecture, gate arrays, control processors, cache memory, main memory, TTL, ECL, and CMOS. Involved board level to system level integration/testing using both.
• Developed software to efficiently locate hardware anomalies using macros and assembly language.