Darin H.

Darin H. Email and Phone Number

Staff Applications Consultant at Synopsys @ Synopsys, Inc.
Darin H.'s Location
Greater Chicago Area, United States, United States
Darin H.'s Contact Details
About Darin H.

Working at Synopsys as a low power and high performance methodology expert.With over 20 years of experience in the semiconductor industry, with knowledge of the complete low power methodology and flow, including verification, implementation and test.Also working on ARM and high performance core optimization. Programming and Software skills:C, C++, Perl, SED, AWK, TCL, TK, Verilog, VHDL, UPFMicrosoft Powerpoint, Excel, Word.Specialties: Low power methodology and flow expertise including the advanced low power methodology with UPF (multi-voltage design, multi-supply design, MTCMOS shutdown, body biasing ) and mainstream low power techniques (clock-gating, multi-Vt optimization, gate-level power optimization, etc.). Also versed in reliability analysis, implementation, and verification for advanced low power and high performance design.

Darin H.'s Current Company Details
Synopsys, Inc.

Synopsys, Inc.

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Staff Applications Consultant at Synopsys
Darin H. Work Experience Details
  • Synopsys, Inc.
    Staff Applications Consultant
    Synopsys, Inc. Jan 2010 - Present
    Sunnyvale, California, Us
    Working as an engagement applications consultant on multiple ARM-base engagements helping to develop reference methodologies for:- Cortex-A7- Cortex-A15- Cortex-A53- Cortex-A57- Cortex-A72
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  • Synopsys
    Low Power Solutions Marketing - Technical Solutions Architect
    Synopsys Feb 2009 - Oct 2009
    Sunnyvale, California, Us
    As a low power solutions architect I helped to define the advanced Low Power methodology for SoC designs based on Synopsys' low power technology. + Developed and delivered low power training - UPF Methodology - Implementation flow - Synthesis - DFT - Placement - CTS - Routing - IR/EM Analysis - Static Timing Analysis - Verification flow - Advanced low power simulation - Advanced low power rule checks - Formal equivalence checks+ Developed collateral - System level power analysis flow (Delivered to customers) - Data sheets - Application notes - DAC demo+ Worked on advanced low power requirements - System level power analysis - UPF methodology enhancements - Flow improvements
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  • Synopsys
    Staff Applications Consultant
    Synopsys Dec 1996 - Feb 2009
    Sunnyvale, California, Us
    Worked as an applications consultant supporting pre-sales engagements as well as doing post-sales customer support.+ Low Power Flow Product Line Lead for Global Technical Services - Acted as the field interface with the factory for the low power methodology engagements. - Coordinated development of low power training for field applications consultants - Worked with R&D to determine product requirements+ Pre-sales support for North America Eastern Region - Developed and delivered presentations - Conducted benchmarks - Produced demonstrations for customers+ Customer support for North America Eastern Region - Design Compiler synthesis - DFT Compiler/DFTMax - Power Compiler, including UPF methodology support - Library Compiler and Milkyway library development and library qualification, especially for advanced low power engagements - IC Compiler - Placement, including advanced low power placement - CTS, including low power CTS - Routing - Signal-EM - PrimeRail - IR analysis - EM analysis - Custom block analysis and modeling - PrimeTime - Static Timing Analysis - Power Analysis - Advanced low power analysis with UPF - Star-RCXT extraction - TetraMax ATPG - MVSim multi-voltage simulation - MVRC multi-voltage rule checking - VCS simulationExpertise in advanced low power design with UPF.
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  • Cadence Design Systems
    Applications Engineer
    Cadence Design Systems Mar 1996 - Dec 1996
    San Jose, California, Us
    Was a design consultant with Spectrum Services on an MPEG audio/video decoder design.Supported synthesis pre-sales engagements.Supported verification with NCSim.
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  • Symbios Logic
    Factory Applications Engineer
    Symbios Logic Jun 1990 - Mar 1996
    Wrote software in C and C++ to create synthesis and verification libraries for Synopsys, ViewLogic, and Verilog formats.Supported customer design handoff as well as tool support for customers.
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  • Unisys
    Intern
    Unisys Jan 1987 - Jan 1990
    Blue Bell, Pennsylvania, Us
    Worked on schematic capture CAD tool development. Worked on IC design and test.
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  • 3M
    Intern
    3M Jan 1986 - Jan 1987
    St Paul, Mn, Us
    Worked in the high voltage lab. Interfaced Commodore 64 personal computer to 250kV transformer to conduct testing. Interfaced HP waveform analyzed to 1.2MeV impulse generator to capture test data. Programming and Software SkillsC, C++, Perl, SED, AWK, TCL, TK, Verilog, VHDL, UPFMicrosoft Powerpoint, Excel, Word.
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Darin H. Skills

Static Timing Analysis Tcl Verilog Soc Eda Low Power Design Asic Logic Synthesis Semiconductors Integrated Circuit Design Vhdl Ic Rtl Design Simulations Primetime Vlsi Debugging Arm Formal Verification Perl Power Analysis Optimization Physical Design Fpga Processors Dft Arm Cortex Optimization Low Power Design

Darin H. Education Details

  • University Of Minnesota
    University Of Minnesota
    Electrical Engineering

Frequently Asked Questions about Darin H.

What company does Darin H. work for?

Darin H. works for Synopsys, Inc.

What is Darin H.'s role at the current company?

Darin H.'s current role is Staff Applications Consultant at Synopsys.

What is Darin H.'s email address?

Darin H.'s email address is dh****@****sys.com

What is Darin H.'s direct phone number?

Darin H.'s direct phone number is (650) 584*****

What schools did Darin H. attend?

Darin H. attended University Of Minnesota.

What are some of Darin H.'s interests?

Darin H. has interest in Collecting Antiques, Exercise, Sweepstakes, Nascar, Low Power Methodology, Home Improvement, Reading, Gourmet Cooking, Sports, The Arts.

What skills is Darin H. known for?

Darin H. has skills like Static Timing Analysis, Tcl, Verilog, Soc, Eda, Low Power Design, Asic, Logic Synthesis, Semiconductors, Integrated Circuit Design, Vhdl, Ic.

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