Darrell S. Email & Phone Number

Sr. Digital hardware designer and Chief Electrical EngineerDesign experience component and board level new design. Proven ability to deliver innovative designs working with start up & SBIRsBackground including radiation hardened, Mil grade parts & designsSpace flight design (part level & computer board level) Including • STRV-1• LADDE Program • IRIS Program • TESS (space telescope) • FPGA Space Level Image processing hardwareAccomplished team leader, adept at developing and guiding teams to deliver top performance.Present designs and system level at:• DARPA PI meetings• MIT TESS CDR • Raytheon design reviews• Space Parts conference• Small Sat conferenceCross functionally manage teams of 20+ engineer’s area of electrical, mechanical, software, firmware and final production design System and board level test procedures United States Patent #7237148 B2 (Jun 2007) “Functional Interrupt mitigation for fault Tolerant computer”