I am the technical lead and architect of a team developing VLAB -- an environment for creating and running hardware simulations (also known as virtual platforms or virtual prototypes). VLAB is used in the semiconductor, automotive, and embedded software industries.My day-to-day activities include software design and development (mainly using Python and C++), technical oversight, process development and refinement, team leadership and development, and planning.

I was responsible for the technical architecture of all VLAB Works products.My day-to-day activities included software design and development, technical oversight, team leadership and development, and some planning.

I was part of a team developing various hardware simulation applications and tools for the semiconductor, automotive, wireless, and embedded software industries.

I developed simulators (virtual platforms) of Freescale's i.MX family of application processors. The hardware models were written in C++ and VirtIO's Magic-C language. The simulators were used to develop low-level software ahead of hardware availability.I developed a model of an advanced AXI interconnect to help Freescale hardware designers make decisions around design trade-offs such as buffer size and transaction queue size.

I developed various hardware simulation tools for Motorola's semiconductor and cellular divisions.The majority of my time was spent on a project developing a cycle-accurate simulator (written in C and C++) for Motorola's family of StarCore DSP platforms. Our fast and accurate StarCore simulators helped the hardware design team decide on design trade-offs and verify their RTL implementation, and enabled software teams to develop low-level software before the hardware was available. Our success meant we were charged with updating the simulator multiple times as new major iterations of the StarCore DSP were developed.I was responsible for the software debugger interface (over TCP/IP) and debug engine of the simulator. CodeWarior and GDB/DDD were supported.As Test Lead, I was responsible for managing a comprehensive test bench written in Perl and test cases written in mixture of C, StarCore Assembly, and Perl.