Dasari Yaswanth Email & Phone Number

Having 3+ years of experience as a ASIC Verification Engineer. With strong background in VLSI design and verification, I also completed Nine-month training at VLSI Guru Training Institute, where I learned and applied design and verification concepts such as Verilog, System Verilog, Universal Verification Methodology(UVM), etc. on the Mentor Graphics -Questa sim tool(EDA tool).I am Passionate about delivering high-quality solutions in the semiconductor industry, and I am always eager to learn the new Technologies and methodologies to improve my skill set which intern helpful for my organization and my career. I am open to new opportunities that align with my expertise and drive for innovation.

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  Sree Vidyanikethan Engineering College

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