Driving Massively Parallel RISC-V/Vector processors to solve AI and other HPC-like computations with exceptionally low power.

Esperanto is still somewhat stealthy, but just raised a $58M Series B round, to help us build the most amazing Machine Learning chips, based on RISC-V.

Built a new team of hardware and software engineers to develop next generation microprocessor architecture incorporating hardware/software co-design. This team improved Code Morphing Software and architectures to look at what performance and power improvements could be extracted on newly co-designed in-order and out-of-order processors. Team consisted of engineers in California, Oregon, Texas, Massachusetts, Spain, Germany, Poland and Israel.

Founded Transmeta Corporation, and was president and CEO for the first five years, and later took on the CTO and other roles. As CEO, led the company to a successful $273MM IPO in November 2000, Transmeta was dedicated to showing that hardware/software co-design could deliver improved processors. Transmeta delivered low-power x86 compatible Crusoe and Efficeon processors, and was the first to demonstrate a fully software defined processor. Transmeta's Code Morphing Software performed binary translation and optimization of x86 programs onto simpler hardware architectures as a way to save power and also to reduce design time, while retaining full x86 compatibility.

Led the development of the 64-bit SPARC ISA and new directions in SPARC processor architecture.

Research staff working on computer architectures to execute the C programing language. Developed several generations of C-Machines, notably CRISP, a C-language Reduced Instruction Set Processor. While at Bell Labs, co-authored "The Case for the Reduced Instruction Set Computer" with professor David Patterson at UC Berkeley.