Global team leader responsible for wafer foundry quality and execution of silicon and package reliability testing across all AMD product lines. This includes support for Client, Server, Embedded, and Semi-custom market segments. I lead two great Engineering teams, one based in Austin and the other based in Singapore.Our influence spans the 3 major wafer foundries, most major Assembly & Test OSATs as well as internal AMD sites.

Global Product Development Manager responsible for product definition, development, qualification & transfer of advanced CPU and APU designs into mass production facilities.

Responsible for transfer & process optimization & re-integration and qualification of High-Voltage/Speed Bipolar processes into Asia based wafer foundries.

Department Manager responsible for High-Voltage/Speed Bipolar process development, qualification and production ramp activities.

Department Manager responsible for all aspects of Fab-orientated Product Engineering. Scope included inline defect inspection, parametric test & data analysis, wafer sort/probe and package yield optimization

Product Engineer responsible for design characterization and yield enhancement activities on read only and non-volatile memories. Lead the product transition from NMOS to CMOS based designs.