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Leader, nurturer of new talent, Contrarian thinker who builds meaningful and impactive relationships across all levels of organization. 15 years envisaging, executing and bringing to High Volume Manufacturing ATE test hardware development (PCB, Thermal management, Handler, Socket) for fine pitch BGA/POP (down to 0.35mm pitch and beyond) and 3D packages in Mobile Sector Fabless semiconductor .15 years + Program Management + Business Development in ASIC design services in semiconductor and EDA industry - design through test and new product introduction. Led design teams and business development initiatives for outsourcing/professional services and in–house design development. Includes management of international design efforts and offshore design teams 24/7 operation. Over 110 ASIC designs in 14 technologies driven from design win to tape out with high first silicon success rate.Specialties: PCB technology innovation for ATE and bench hardware for high pin count narrow pitch devices - PCB, Connector, ASIC/SOC design Program Management and Business development. Co-developing future solutions with key suppliers.ATE test socket and handler hardware development for advanced packages.
Self- Empoyed. Test Hardware Consulting.
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Chief ExecutiveSelf- Empoyed. Test Hardware Consulting. Jun 2016 - PresentAdvise on:Solutions for Sockets, PCB, Handler and Test Thermal Management Thermal for Characterization of fine pitch high pin count devices, POP and WLSP.Forward Strategies and Methodologies to test advanced packages.Access to specialized consultants in specific technology domains.Risk analysis, sourcing of PCB and sockets, vendor availability and specialties.
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Sr Staff Engineer/ManagerQualcomm Mar 2003 - Jun 2016San Diego, Ca, UsBuilt and coached a great team of world class engineers performing Test Hardware development for new high pin count Digital/Mixed Signal SOC chip sets. Includes driving development of high layer count (32 - 50) load boards for fine pitch and high parallelism, and socket and handler tooling solutions for lower test cost. -
Advisory Board MemberExecutive Perspective For Scientists And Engineers 1994 - Jul 2012Voluntary. Included participation in Curriculum development and lecturer feedback for class of 20-30 focused on management development of upcoming executives across San Diego Technology (principally) companies. Participated in EPSE activities and provided class in IP Procurement considerations with Attorney Randy Broberg..
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Sr Project ManagerCadence Systems 1999 - 2001San Jose, California, UsProgram Manager responsible for supporting sales with new business development customer engagement, harvesting and shaping customer requirements and SOW/proposal development. Managed our design team customer interface with status /issue resolution and project reviews and execution through completion. Managed team in US and contributing design centers in US and India to drive completion of multiple complex ASIC/SOC designs with high level of customer satisfaction. Based at Cadence/Tality San Diego design center. -
Sr. Program ManagerSynopsys 1995 - 1999Sunnyvale, California, UsProvided On Site Consulting to start up and Large Companies leveraging Synopsys EDA tools, IP/Design Reuse Capabilities and Products. Drove and supported Sales for New Business Opportunities assisting Sales with penetrating new accounts, creating and delivering compelling Proposals. Followed through with costing/pricing, SOW creation, resource assignment, on boarding of design team, interfacing to customer, providing status, harvesting revenue to plan, issue resolution and prospecting follow on and peripheral business.Accounts supported included Motorola, Cisco, TI, Conexant , Sony and start-ups like Yuni Networks.Based in San Diego but divided time between San Jose, Mountain View , Phoenix and Austin.Engagements were mainly on-site RTL creation and verification, Design Compiler, Vera Verification, Reuse Methodology and DFT methodology and Tetramax vector creation. -
Senior Program ManagerCadence - Design Services 1992 - 1995Provided turnkey VLSI design through silicon fabrication /test services to start up and large companies based on acquired Unisys design center. Drove and supported execution of New Business Opportunities assisting Sales with penetrating new accounts, creating and delivering compelling Proposals. Then following through costing/pricing, SOW creation, resource assignment. Then on boarding of design team, interfacing to customer, providing status, harvesting revenue to plan, issue resolution and prospecting follow on and peripheral business.Brought over 10 new designs to first pass silicon success with revenues of ~ $15M.
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Sr Program And Asic Applications Support MgrUnisys 1982 - 1995Blue Bell, Pennsylvania, UsASIC Design Center and initially silicon (CMOS and Bipolar) and package fabrication facility with full test floor, IC design teams, CAD tool development group and memory module design. Instrumental in penetrating and building internal customer base for our Stand Cell (CMOS) and Biploar Gate array product and tool set. Managed team of 7 supporting Burroughs/ Unisys Systems plants with CMOS ASIC technology adoption. 25 System Plants supported at peak and over 1000 designs implemented .Trained over 600 Systems Design Engineers in our CMOS design tools and technologies. -
Process Engineering Manager/Brazil Plant Gm.Burroughs 1975 - 1982Elmhurst, Illinois, UsCreated plan for equipment, processes facility and selected Brazil location and preliniary team before project cancelled because of economic conditionsManaged team of 6 and operated hands on for managing processes, new equipment definition , issue resolution, yield improvement and cost reduction in facility of 80,000 supplying all Burroughs with PCB. Managed chemical and physical labs for Process Quality Control and evaluating new materials and processes.UK Facility - Process Engineering Manager responsible for turning around loss making PCB facility to improve Quality/yield and win back customer confidence. Also bring up new products (fine line and Multilayer) and establish PCB layout facility.
Dave Waite Skills
Dave Waite Education Details
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Newcastle UniversityInorganic Chemistry Boranes -
Johnston School DurhamPre University
Frequently Asked Questions about Dave Waite
What company does Dave Waite work for?
Dave Waite works for Self- Empoyed. Test Hardware Consulting.
What is Dave Waite's role at the current company?
Dave Waite's current role is Chief Executive at Self - Employed. Test Hardware Consulting..
What is Dave Waite's email address?
Dave Waite's email address is dw****@****omm.com
What is Dave Waite's direct phone number?
Dave Waite's direct phone number is (908)-443*****
What schools did Dave Waite attend?
Dave Waite attended Newcastle University, Johnston School Durham.
What are some of Dave Waite's interests?
Dave Waite has interest in Gardening.
What skills is Dave Waite known for?
Dave Waite has skills like Semiconductors, Asic, Soc, Pcb Design, Testing, Cmos, Ic, Electronics, Engineering Management, Debugging, Wireless, Embedded Systems.
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