David Adams Bsee / Mba Email & Phone Number
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David Adams Bsee / Mba is listed as Technical Consultant based in Austin, Texas, United States. AeroLeads shows a work email signal at att.net and a matched LinkedIn profile for David Adams Bsee / Mba.
David Adams Bsee / Mba previously worked as Technical Staff Engineer at Microchip Technology Inc. and Staff Test Engineer - Project Lead Engineer at On Semiconductor. David Adams Bsee / Mba holds Mba, Management from Amberton University.
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AeroLeads found 1 current-domain work email signal for David Adams Bsee / Mba. Compare company email patterns before reaching out.
About David Adams Bsee / Mba
Internationally experienced semiconductor test Engineer with expertise in:• Digital, analog, and mixed signal test programming and debug • Automotive CMOS Image Sensors• Ultra-high volume ASIC production test solutions• Digital: ASIC, logic, transceivers, microcontrollers, I2C, MIPI, SPI, and JTAG serial interfaces• Memory: SRAM, DDR DRAM, ONFI Open NAND Flash Interface, OTPM (programmable memory)• Mixed-signal: ASIC, efuse, mux, ADC, LDOs, PLL, analog front-end & digital filter.• SoC dual-core automotive microcontrollers.• Software revision control with GIT repo.• Validation/characterization of high-speed MIPI I/O signal integrity including eye margin analysis.• Pattern conversion of WGL, VCD / eVCD files to ATE format.• ATPG for memory test pattern generation, JTAG for scan test, MBIST for SRAM and DRAM.Achievements & Quantifiable Results:• Designed parallel probe hardware and software, which increased production four-fold, created million-dollar annual cost reductions, and pushed product from loss to profit column at the bottom line.• Technical Lead on code development and ATE hardware interface design for diverse products from x4 microcontroller to x8 image sensor to x128 ASIC to 384-site memory test load boards.• Created code template for a score of DRAM test applications, simultaneously improving code quality and reducing development time by 50% • Deployed highly parallel / high-volume solutions to production facilities in Germany, China, S. Korea, and Taiwan. (128 site ASIC probe and 384 site DRAM package)• Experienced in mentoring and leading junior engineers as a technical team leader.• Authored and presented technical papers at conferences• Innovation • Project Management • Software Process Improvement • Troubleshooting • Microchip • Production test • Cost reduction • Semiconductors • IC • Silicon • Mixed Signal • DFT • Qualification • Characterization • Debug • Yield Enhancement • Team Lead • Electronics Engineering • IG-XL • ATE: Teradyne J750, IP750Ex, Teradyne Catalyst A585, LTXCredence Quartet, Advantest V5500.•TOOLS: C/C++, Visual C++, Visual Basic for Applications, and Python scripting language in Windows and Linux. Eclipse IDE, XEmacs editor, GitLab, GNU Octave, GNU compiler GCC, GDB debugger, MS-Project, MS-Office, TSSI and WaveWizard pattern conversion, Visual Studio, Cornerstone, Exensio-Yield DataPower & SiliconDash data analytics, SixSigma, ANOVA, Gage R&R, O'Scope, DMM.• I have done 20+ years of semiconductor test program development , and the last 8 years were image sensor testing.
Listed skills include Testing, Semiconductors, Ic, Debugging, and 48 others.
David Adams Bsee / Mba work experience
A career timeline built from the work history available for this profile.
Technical Staff Engineer
CurrentAdvantest V93000 test applications for MEMS clock + ASIC stacked package parts.
Staff Test Engineer - Project Lead Engineer
- Earned 2022 Bravo award for characterization of at-speed MIPI serial interface at 1.25Gbps. (High-speed signal integrity validation) Presented data on the root cause of ATE speed limitations, corrective action, and.
- Project Lead for mixed signal test hardware design and software development on Teradyne IP750 for automotive image sensors including Safety & Security I/Ps.
- Developed, debugged & supported test programs from new product introduction phase to high volume manufacturing.Applied problem-solving skills;
- redesigned probe cards for an image sensor application, changing power distribution on the card with dramatically improved test performance. This improved test yield by removing false fails at standby current.
- designed multi-site parallel vertical technology probe cards for high-volume production.
- replaced a package test program, improved image capture quality an order of magnitude and achieved a huge yield improvement.
Council Member
Consulting for GLG clients in the field of semiconductor test engineering, software process improvement and related services including data analytics. Extracting value from data analytics for product characterization, correlation, process control, test cost optimization and yield improvement. Identifying root cause of pain points within engineering.
Senior Principal Test Engineer
- Note: BAE Systems acquired Fairchild Imaging in 2011.ATE test development for advanced high-performance scientific CMOS image sensors achieving nearly 16-bit dynamic range. Design probe cards with ADC circuits to.
- read noise
- fixed pattern noise (FPN)
- full well capacity (FWC).Skills Acquired: Teradyne IP750, GNU Octave programming (an open-source alternative to MATLAB)
Senior Specialist Test Engineering
* Infineon Info: Did you know that most automobiles contain more than 25 Infineon chips?Designed Teradyne J750 ATE test interface hardware and developed test programs for MEMS mixed-signal CMOS ASICs.Developed reliable high-performance test solutions which provide optimum throughput, yield, and cost for Infineon.Developed unique test flows for NPI.
Design & Engineering Manager
- Designed new products and prepared and filed patent applications.
- Performed comprehensive prior art searches for intellectual property.
- Mastered patent law fundamentals per the USPTO Manual of Patent Examination Procedure.
Contract - Test Development Engineer
- Planned, designed and implemented electrical semiconductor test solutions including both hardware and software in compliance with military specifications and customer overscreen requirements. Test plan development.
- Exceeded objectives on test package deliverable items for aggressive year-end customer commitments.
Joint Venture Business Management Consultant
- Grenitech, Inc. turns ideas into viable businesses by semi-automating business processes (enables creation of corporations by providing essential support systems for core business operations.)
- Developed a strategic intellectual property management plan, creating a software driven process flow for guiding intellectual property management based on the current legal environment and positioning to take advantage.
- Created tools for web site traffic generation.
Sr Test Engineer
- Created test applications for microchip characterization across operating voltage & temperature.
- Streamlined test development for a family of DDR DRAM memory by implementation of modular code.
- Translated Flash memory test patterns from Advantest to Verigy tester format.
- Maintained project management interface with customers.
- Developed applications on Teradyne, LTXCredence, Verigy V5500 test platforms.
- Developed characterization test flow for DC parameters and functional test patterns.
Test Engineering Advisor
- Obtained Department of Defense customer qualification acceptance of Celestica software development processes via written presentation, verbal communication, and demonstration.
- Advised Test Engineering team on reduction of false fails, improving repair loop, & reducing production line down time.
- Negotiated cost savings on maintenance contracts.
- Created return-on-investment analysis and cost justification for capital equipment acquisitions.
Principal Product Staff Engineer
- Project Lead on test development for dual core HC12 automotive microcontroller / processor.
- Implemented successful cost reduction via platform conversion, parallel test, and run time reduction.
- Transitioned product into high volume production test w/ dramatically reduced costs.
- Integrated hardware & software and perform statistical test data correlation.
- Developed Perl scripts for test pattern conversion.
- Converted code from C language to Visual Basic implementation.
David Adams Bsee / Mba education
Mba, Management
Education record
Education record
Bs, Electrical Engineering
Object Oriented Programming In C++
Python Programming
Frequently asked questions about David Adams Bsee / Mba
Quick answers generated from the profile data available on this page.
What is David Adams Bsee / Mba's role at their current company?
David Adams Bsee / Mba is listed as Technical Consultant.
What is David Adams Bsee / Mba's email address?
AeroLeads has found 1 work email signal at @att.net for David Adams Bsee / Mba.
Where is David Adams Bsee / Mba based?
David Adams Bsee / Mba is based in Austin, Texas, United States.
What companies has David Adams Bsee / Mba worked for?
David Adams Bsee / Mba has worked for Microchip Technology Inc., On Semiconductor, Gerson Lehrman Group Limited, Bae Systems, and Infineon Technologies.
How can I contact David Adams Bsee / Mba?
You can use AeroLeads to view verified contact signals for David Adams Bsee / Mba, including work email, phone, and LinkedIn data when available.
What schools did David Adams Bsee / Mba attend?
David Adams Bsee / Mba holds Mba, Management from Amberton University.
What skills is David Adams Bsee / Mba known for?
David Adams Bsee / Mba is listed with skills including Testing, Semiconductors, Ic, Debugging, Mixed Signal, Test Engineering, Soc, and Asic.
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