• Hands-on layout experience with various circuit blocks with 0.1 um 5-layer metal BiCMOS Nwell technology: basic and complex logics, D flip-flop, Data latch, Shift Register, SRAM, Bias, PLL, ESD’s, I/O devices. • Accomplished a Mixed-signal Transceiver Circuit (10k devices) project using CCAR including Clock Generator, ESD circuit, Bond Pads, Process and Product related structures, engineering test circuit and PCM.• Completed a PLL mixed signal layout under 25umx28um including guard rings, matching Capacitor and resistors matching with Inter-Digitated with common-centroid, grounded shield plate covered, Metal 1 mask option and, dummies• Finished a Bias circuit layout under 32um x32um involved guard rings, resistor matching and shielding, MOSFET cross-coupling matching, BJT matching and bent-gate.• Achieved a 1KSRAM circuit layout consist of 1 bit RAM cell layout within 1.26 by 2.07um applying Narrow Pitch Planning. Layout other circuit blocks using pitch cell technique for Pre-Charge, Ymux, Read-Write control, xdecoder, and pre-decoder fulfilling various requirements such as wire Vdd/Vss wire width, multiple vias/contacts for connections, taps and Guard-Rings.All these obtain from the time in Silicon Draft Institute

1. Technical Support• Supported both major OEM accounts and end customers' issues in Pre-Sales and Post-Sales including product selection, technical inquiry, and troubleshooting. • Debugging customers' report issue on motherboard or system products such as relating hardware, driver, BIOS, OS, application, usage, customization, and performance. • Worked with various cross functional teams including Sales, PM, and RD to resolved issues in a timely manner. Multitasking and handling various cases under tight schedule. • Tradeshow setup. Setup demo or evaluation units for the customers. • Internal SW and HW testing for potential cases or new products. Production Manager• Parts’ list checking for Production, qualifying new parts, and defining Production line SOP • Training production team to perform new task and SOP flow. Provided technical assistance on engineering issue encountered during production. • Production OS (Window, Android, or Linux) image building, cloning, installing, and testing for both standard and customized cases. Assemble and build-up system products, test, and QCRMA manager• Coordinating RMA logistics and schedule. Troubleshooting and finding root cause the RMA cases. • Responsible for RMA department’s logistics and schedule. Helped with RMA policy and website.

System level integration and testing.

Back-end Timing Analysis, Place and Route ASIC chips.

Completed USB host & ICC models (front end RTL design) in VHDL and performing test using ModelSim.