David Garrett

David Garrett Email and Phone Number

VP of Technology and Innovation | IEEE Fellow @ Synaptics Incorporated
san jose, california, united states
David Garrett's Location
Irvine, California, United States, United States
About David Garrett

David Garrett is a VP of Technology and Innovation | IEEE Fellow at Synaptics Incorporated.

David Garrett's Current Company Details
Synaptics Incorporated

Synaptics Incorporated

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VP of Technology and Innovation | IEEE Fellow
san jose, california, united states
Website:
synaptics.com
Employees:
857
David Garrett Work Experience Details
  • Synaptics Incorporated
    Vp Of Technology And Innovation
    Synaptics Incorporated Dec 2024 - Present
    Irvine, California, United States
  • Movellus Inc.
    Technical Advisor
    Movellus Inc. Aug 2024 - Present
    A technical advisor on the Aeonic family of products for sensing, clocking and power distribution.
  • Mecps Uci
    Advisory Board Member
    Mecps Uci Jan 2023 - Present
    Irvine, California, United States
    The Professional Master of Embedded and Cyber-physical Systems Industry Advisory Board.
  • Sevenrl
    Founder
    Sevenrl Aug 2024 - Dec 2024
    United States
  • Fabric Cryptography
    Co-Founder | Chief Technology Officer (Cto)
    Fabric Cryptography Jan 2023 - Aug 2024
  • Syntiant Corp.
    Senior Vice President Of Engineering
    Syntiant Corp. Mar 2022 - Jan 2023
    Irvine, California, United States
  • Syntiant Corp.
    Chief Architect
    Syntiant Corp. Nov 2021 - Jan 2023
  • Syntiant Corp
    Vp Of Hw Engineering
    Syntiant Corp Nov 2017 - Nov 2021
    Irvine, Ca
  • Broadcom Limited
    Distinguished Engineer
    Broadcom Limited Feb 2016 - Nov 2017
    Irvine, Ca
    + Helped deliver 802.11ax silicon in both WiFi smartphone combo chips and router platforms+ 90+ US Patents granted to date+ Key architecture of Transmit Beamforming Architecture for 1+ billion 802.11ac WiFi parts
  • Broadcom Corporation
    Associate Technical Director
    Broadcom Corporation Sep 2007 - Feb 2016
    Irvine, Ca
    + Recognized as a Distinguished Engineer+ Chair of the Broadcom Foundation’s Annual University Research Competition, and member of the University STEM Research Committee+ Expert at Digital Signal Processing (DSP) design in all area of VLSI design, member Broadcom’s DSP Task Force+ Expert in High-Level Synthesis flows, modeling complex systems in SystemC, and automating the construction of HW Designs+ Technical Program Co-Chair for the IEEE Symposium on Low Power Electronics and Design (ISLPED). + Able to build high-performance, low-power VLSI systems, with expertise in the entire flow, from system and algorithm design, chip architecture, DSP and development cores, through the backend, Place and Route, and full-custom VLSI if needed+ Expert in almost all modern communications systems, including 802.11ac, LTE, Bluetooth, 802.11ad 60 GHz, WiMax, GPS, 3G/HSPA, 10G Ethernet+ Expert in MIMO, Forward Error Correction (FEC), FFT Processing, Analog Front-end Filtering, Acquisition, Spectral Analysis, Linear Algebra Accelerators, Floating point arithmetic+ Responsible for the Transmit Beamforming (TXBF) Architectures in both the AP and STA side of 802.11ac chipsets, shipping in the hundreds of millions of chips+ Member of Broadcom's Patent Review Committee, with 50+ Granted US Patents to-date+ Expert witness in Patent litigation, including infringement and defense.
  • Beceem Communications
    Director Of Engineering - System
    Beceem Communications Apr 2004 - Jul 2007
    Santa Clara, Ca
    + As Director of R&D Systems Engineering managed a team of 11 engineers responsible for all WiMax reference designs.+ Technical lead on Beceem’s WiMax infrastructure products, including specifications, S/W and H/W architectures. Ran multi-functional teams across both US and India sites.+ Lead the PHY architecture for 1st and 2nd generation WiMax mobile chipsets, including overall architecture from RF input to MAC payload delivery. Innovations in the FEC, Hybrid-ARQ management, MIMO receivers, as well detailed work in RTL to bring the chipset to market in record time. + Active representative to the WiMax Forum to define WiMax certification profiles. Key achievement was the push to include MIMO as a mandatory feature, favoring Beceem’s silicon solutions.
  • Lucent - Bell Laboratories
    Member Of Technical Staff
    Lucent - Bell Laboratories Jan 2000 - Mar 2004
    + Performed research on multiple-input multiple-output (MIMO) receiver architectures.+ As a principal investigator, delivered first-pass working silicon for a 4x4 MIMO receiver including space-time equalization for data rates up 28.8 Mb/s over a 5 MHz frequency selective+ Helped develop innovative Turbo Code architectures, with Lucent ultimately developing a product team to build HSPA infrastructure chipsets.
  • Lockheed Martin
    Design Engineer
    Lockheed Martin Jun 1994 - Dec 1997
    Burlington, Vermont Area
    + Hired into the Engineering Leadership Development Program, a 3-year program with rotations around the business. Originally based on the GE Edison program, including becoming an instructor in the program.+ Obtained a Masters’ degree in Electrical Engineering (EE) while working full-time.

David Garrett Education Details

Frequently Asked Questions about David Garrett

What company does David Garrett work for?

David Garrett works for Synaptics Incorporated

What is David Garrett's role at the current company?

David Garrett's current role is VP of Technology and Innovation | IEEE Fellow.

What schools did David Garrett attend?

David Garrett attended Wharton Executive Education, University Of Virginia, University Of Vermont, University Of Virginia.

Who are David Garrett's colleagues?

David Garrett's colleagues are 缪文蔚, Yutaka Kobayashi, Sanjib Rout, Vishwa Bharathi R V, Berham Su, Barry Lin, Pavan Kumar Vuddagiri.

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