Logic Design Engineer
CurrentI design logic for Power Server Systems, been involved in verification roles, and actively engaged in a patent group. This entails designing high-level architecture, writing & debugging VHDL code, developing C/C++ based drivers & checkers, and introducing new and creative ideas to IP Law.I work with logic, verification, and physical design teams around the world to meet chip requirements which include proper functional behavior, performance targets, timing closure, macro area & wire routing, power dissipation, and error handling.I've been involved in OpenPower projects, which aims at customizing current and new generations of Power servers, networking, and storage hardware. I also collaborate with OpenPower partners including Google, Nvidia, Mellanox, Tyan, and others.