David Marquart Email & Phone Number

Lacrosse, Wisconsin

Testing firmware in system controllers for large industrial applicationsAutomated firmware test (test generation and testing).Manual test procedure development and documentation.Analysis of system specifications to generate tests for new systems and modifications to existing systems, as well as adapting existing tests to new versions of systems, where the timings that the old tests accepted no longer passed and needed new analysis and verification. Generated new automated tests and manual tests for new systems, modifications of old systems, and moving manual tests to automated self-checking tests.

Rochester Mn

Contracting at Hitachi, updating disk firmware. Wrote code activating new hardware that copied storage values and allowed zeroing storage in control storage of the processor controlling the disk hardware.

Rochester Mn

Contract position at IBM involving logic verification. The chip involved was a processor for a game console, and it required extensive verification. I verified the chip's interface with an external cache chip, and then verified the internal connection between chips that had been merged together. The latter involved verifying that the scan paths between two separate sections of logic was complete and able to disconnect the two sections of logic. My table-driven solution took a list of latches that performed the separation and generated a script that checked all possible interactions. There were three lists of separation latches; I verified two of them and was working on the third when they got rid of all the contractors (economics, or actually, bonuses for the executives).

Mounds V Iew, Minnesota

Contracting at Medtronic verifying logic and designing logic.This is a continuation of my previous contract with Medtronic. It overlaps with the previous experience because it wasn't really a new experience, just a different contracting company.,

Mounds View, Minnesota

Contractor doing logic verification and design.The initial assignment was to verify a Verilog chip design containing a 68HC11 processor and custom peripherals. After completing that assignment, it continued on to another chip with the same processor, but including design as well as verification. I was the CPU specialist, along with designing special hardware for address trapping and verification of the CPU and other custom hardware elements. I also wrote tests for another section of the new chip that verified an existing communication protocol (because they wanted someone who had not designed the logic to test it).Aside from the communication tests, I adapted existing firmware tests that checked the instruction logic of the embedded processor and confirmed that the instructions worked. I also found out that the software interrupt instruction failed under certain situations, but that did not make the processor a failure (even though it had been accepted for a decade). I also found other logic problems that had been latent for quite some time. I consider this experience, under a strong regulatory background and strict checking, to be some of the best experience I have had in testing.

Rochester Mn

The Zenasis company was trying to sell its solution (generating macros specific to a design dynamically so that space and timing could be optimized), and I added features to the product that were necessary (conversion of Verilog shape descriptions to rectangular elements, for example, and analysis of CMOS FETs that were dealing with clock edges). Among other things, I wrote much of the system documentation and added logging code to the system so that it could provide a history of the modifications to a design.

Rochester, Mn

Previously Simulation technologies and Summit Design.Virtual CPU (V-CPU) product that connected running C programs with simulated hardware, allowing faster check-out of the design and early testing of low-level software.The VCPU product interfaced with Verilog and VHDL simulators to simulate a CPU. The product allowed a C compiler on the hosting platform to interface with the simulated system, allowing a C program on the host system to act as a stimulus to the simulated system through a bus-control model. Many CPUs were modeled through the system, such as IBM POWER 405 and many other embedded CPUs. The idea was that the CPUs were proven and understood technology, and that the bus units connected to their proven buses needed verification.I joined Summit Design, which merged with Viewlogic to form Innoveda. When Innoveda spent all the money they gained from Summit Design, the company fell apart and they laid off most of the old Summit Design company. (I add this because people wondered if I was a job-hopper; I left this and the previous two companies because they either folded, were folding, or were dropping the product line I was working on).

Rochester Mn

Verilog code coverage product.Left because the company was close to folding.

Rochester Mn

VHDL Simulator developmentLeft because the company was closing the local office.

Rochester, Mn

Varied. Logic design for computer processors and I/O equipment, microcode, I/O gear, much workon various I/O buses, logic test, JTAG, built-in self-test.

Bsee, Msee, Electrical Engineering

Activities and Societies: Tau Beta Pi, Eta Kappa Nu, CHUSFAI took logic (computer structure) courses, computer science courses.

Bachelor Of Science, Electrical Engineering

Activities and Societies: Tau Beta Pi, Eta Kappa NuI studied computer systems. The PLATO system was an active experiment in those days.