Electronics Packaging Engineer
CurrentResearch interests in electronics manufacturing processes and reliability. Currently focusing on high temperature electronics packaging, thermal management, and long term life predictions.
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David Shaddock is listed as Electronics Packaging Engineer at General Electric Global Research at General Electric Global Research, based in Schenectady, New York, United States. AeroLeads shows a work email signal at ge.com and a matched LinkedIn profile for David Shaddock.
David Shaddock previously worked as Electronics Packaging Engineer at General Electric Global Research and Manufacturing\Process Engineering Group Leader at Rockwell International. David Shaddock holds Ms Eng, Electronics Manufacturing from Rensselaer Polytechnic Institute.
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David Shaddock is a Electronics Packaging Engineer at General Electric Global Research at General Electric Global Research. He possess expertise in manufacturing, design for manufacturing, process engineering, engineering, automation and 13 more skills.
Listed skills include Manufacturing, Design For Manufacturing, Process Engineering, Engineering, and 14 others.
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Niskayuna, New York
Research interests in electronics manufacturing processes and reliability. Currently focusing on high temperature electronics packaging, thermal management, and long term life predictions.
El Paso, Texas Area
Manage team of engineers at the Manufacturing Center of Excellence. The team is responsible for improvements in throughput and quality in all factory processes as well as development of new processes and packaging.
Dallas, Texas
I was responsible for planning and supervision of engineers and engineering technicians who performed process development and consultation associated with SMT manufacturing. Projects include robotics workcell design, machine vision component inspection, fine pitch assembly, CFC elimination, solder joint reliability, double sided reflow, and process.
Dallas, Texas
My duties involved introduction and setup of the first high volume automated SMT assembly line at the Dallas facility. It operated with a Just in Time manufacturing system and incorporated the Team Concept. On going duties included creating design guidelines, DFM reviews, design of SMT component footprints, screen printing techniques, design and support of.
Schaumburg, Ilinois
My duties involved introduction, setup, and support of the first SMT solder reflow assembly process for the division. This included creating process design guidelines, component footprints, screen printing techniques, infrared reflow parameters, and automated component placement methods using a robot and dedicated placement equipment.
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David Shaddock works for General Electric Global Research.
David Shaddock is listed as Electronics Packaging Engineer at General Electric Global Research at General Electric Global Research.
AeroLeads has found 1 work email signal at @ge.com for David Shaddock at General Electric Global Research.
David Shaddock is based in Schenectady, New York, United States while working with General Electric Global Research.
David Shaddock has worked for General Electric Global Research, Rockwell International, and Motorola.
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David Shaddock holds Ms Eng, Electronics Manufacturing from Rensselaer Polytechnic Institute.
David Shaddock is listed with skills including Manufacturing, Design For Manufacturing, Process Engineering, Engineering, Automation, Process Simulation, Process Improvement, and Robotics.
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