Senior Test Engineer
Produced and released acceptance test protocol for multiple assemblies for Lasik system before integration into complete system. Conducted tests on assemblies before final assembly of system.
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David Bolander is listed as Project Lead/Sr. Hardware Design Engineer based in San Jose, California, United States. AeroLeads shows phone signal with area code 408, 201 and a matched LinkedIn profile for David Bolander.
David Bolander previously worked as Senior Test Engineer at Abbott Medical Optical (Hcl Consultants) and Project Test Lead at Microsoft. David Bolander holds Master’S Degree, Electrical Engineering Digital Hardware Design And Digital Signal Processing from San Jose State University.
Senior Design Engineer with a wide variety of experience in the design of digital hardware with some elements of both low and high voltage analog circuitry. Many years of experience in digital design and verification of FPGA firmware using Verilog.Interested in developing hardware and systems utilizing FPGAs, ASICs, and microcontrollers.Specialties: Digital and Analog System DesignFPGA Verilog firmware development (Altera and Xilinx)Tools Used:Altera Quartus II and SOPC ModelSim SEXilinx Foundation SoftwareSynopsys for ASIC Verilog simulationsKeil 80C51 CompilerNohau 80C51 emulatorsARM compilerARM emulatorsPADS Logic schematic capturePADS PCBOrcad schematic captureLogic AnalyzersOscilloscopesRF & Digital Signal GeneratorsSpectrum AnalyzersNetwork AnalyzersDMMs
Listed skills include Fpga, Embedded Systems, Firmware, Hardware Architecture, and 31 others.
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Milpitas, Ca
Produced and released acceptance test protocol for multiple assemblies for Lasik system before integration into complete system. Conducted tests on assemblies before final assembly of system.
Redmond, Wa
Monitored and drove activities regarding test verification and bug resolution of game controller. • Evaluated verification test process to determine gaps in verification test procedures• Monitored progress of verification test cases for gaming controller and reported status to management.• Prioritized and drove to closure hardware and firmware bugs on gaming controller.
Sunnyvale Ca
Performed Early Field Failure Analysis of returned units including headsets and wearable lifestyle bands.• Investigated unit returns of headsets to determine failures and recommend corrective measures to engineering design team.• Worked with offshore manufacturer to produce automated test system for performing Incoming Quality Control testing of prepackaged units• Set IQC tester up at remote packaging sites and trained personnel to use the test equipment for Incoming Quality Control testing.• Maintained tester hardware and modified scripts used by tester to enhance test coverage and improve throughput of incoming units and improve tester reliability.
San Diego, Ca
Integrate and test mobile device hardware. Troubleshoot and resolve hardware problems. Verify the performance of high speed serial interfaces, touch controls, batteries, and battery charge management circuitry. Perform battery performance and power consumption testing to identify and resolve power consumption issues in various modes of operation to maximize battery life in low power devices.
Sunnyvale, Ca
Responsible for the design and manufacture of custom test equipment used in the support of firmware and hardware verification of implantable defibrillator/pacemaker devices. Designed digital interface module used to provide command, control, monitoring and stimulus to the device under test in order to detect and capture events for automated testing of the device firmware. Updated previous design in order to replace obsolete digital interface module and heart simulator module. Utilized the latest Altera FPGAs, PCIe interface, DDR2 memory, custom high speed serial interfaces (LVDS), analog to digital converters and DACs to increase tester capability and to reduce system cost.Collaborated with other engineers to update the analog circuitry used to detect low voltage and high voltage signals and to provide low voltage stimulus and variable lead configurations to the device under test for automated testing. Created schematics and collaborated with part suppliers, PCB layout and fabrication contractors to produce final product.Created support documentation including design description documents, acceptance test plans, schedules, and budget requests for the hardware and Verilog firmware development.Developed Verilog firmware for FPGAs including incorporating a PCIe interface, DDR2 interface and 660Mps serial interfaces that communicated between each of the three modules of the latest test platform.Supervised contractor in the development of Verilog test-benches for the FPGA firmware development and the running of simulations of the FPGA code using Mentor’s ModelSim software.Supervised multiple junior engineers and performed reviews and mentored them in the performance of their tasks.Isolated user issues during operation of the test platform to determine tester or user problems and to come up with corrective actions.
Santa Clara, Ca
Responsible for the development of GSM system evaluation boards. Conducted verilog verification testing for the GSM digital baseband IC. Accomplishments: Performed verilog simulations of the GSM digital baseband IC using Synopsys and Signalscan. Developed microcontroller (CRI6 and ARM) programs used for verilog verification testing. Designed, fabricated and tested the GSM system verification boards used in IC verification and software development. Collaborated with part suppliers, PCB layout and fabrication contractors to produce final product ahead of schedule. Conducted prototype testing using Xilinx FPGAs and Synopsys on CR16 and ARM systems in order to troubleshoot design problems with the GSM digital baseband IC. Supervised, mentored and trained two engineers and one technician to support the GSM chipset and system evaluation board development. Provided customer support for GSM chipset integration and production.
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David Bolander is listed as Project Lead/Sr. Hardware Design Engineer.
AeroLeads has found 5 phone signal(s) with area code 408, 201 for David Bolander.
David Bolander is based in San Jose, California, United States.
David Bolander has worked for Abbott Medical Optical (Hcl Consultants), Microsoft, Jawbone, Nokia, and St. Jude Medical Inc.
You can use AeroLeads to view verified contact signals for David Bolander, including work email, phone, and LinkedIn data when available.
David Bolander holds Master’S Degree, Electrical Engineering Digital Hardware Design And Digital Signal Processing from San Jose State University.
David Bolander is listed with skills including Fpga, Embedded Systems, Firmware, Hardware Architecture, Verilog, Analog, Schematic Capture, and Arm.
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