David De La Rosa Email & Phone Number

Phoenix, Az, Us

Experienced engineer who performs various software development life cycle (SDLC) and various hardware development life cycle (HDLC) for Aerospace & Defense, Automotive, Industrial control, Communications, and Medical applications.Software:• Analyze, plan, implement, and test software collateral for auto functional safety according to ISO26262• Redesign, Implements and test various Avionics DAL software collateral against DO-178B/C guidelines• Perform safety validation and verification of various software collateral against IEC62304• Design, develop, test, and integrate high level software using C, C++, and Python• Perform code reviews, develop test procedures, wrote documentation• Used MATLAB and Simulink for design modeling and simulationHardware:• Perform functional safety validation and verification of hardware systems, hardware components and hardware devices• Experience with NXP SoC with PowerPC and ARM core systems• Perform hardware troubleshooting and circuit analysis• Perform hardware reliability, components degradation, and MTTF (Mean Time To Failure) analysis to boards and systems• Experience with Ethernet, CAN, I2C SPI, UART communication protocolsI have accumulated working experience and knowledge with the following hardware and software tools:. MS VS C, C++, and Python. PowerPC and ARM Assembly Languages. MS Office, Proj Mgmt - Agile and Waterfall. Rational ClearCase, DOORS, Jira, TortoiseSVN. GHS MULTI-IDE, Probe & WRS WorkBench-IDE, Probe, ICE2. VxWorks and other proprietary RTOS. Various protocol analyzers, Wireshark. Various digital scopes, logic analyzers, Bit error rate tester, spectrum analyzerPersonal:. US Citizen. Good communication skills. Dual experience with SW and HW improve my analysis & testing capabilities. Good understanding of Digital and Analog circuits and functionalities. Always improving my skill sets, researching quickly new materials, and applying them to embedded world

New York, Ny, Us

- Developed C software for embedded modem system used in the Predator UAV . + Awarded L-3 Silver Achievement Award as a key contributor to Predator Modem Tiger Team. * Quickly identified and offered solutions plaguing aspects of the project.- Developed C++ code for Navigation and Networking software in a ROVER transceiver box.- Experienced with L-3 software coding guidelines, and L-3 SW Requirements & Design Guideline.- Experienced with L-3 Software Development Life Cycle (SDLC) process.- Experienced with Unified Modeling Language (UML).- Experienced with IBM Rational ClearCase for software assets and design artifacts management.

Performs software development life cycle (SDLC) and hardware development life cycle (HDLC) for various industries such as Aerospace & Defense, Automotive, Industrial control, Communications, and Medical applications.- Developed and modified BSPs and low-level device drivers for various PowerPC and ARM core board systems.- Experienced with VxWorks (5.5, 6.0) and other proprietary RTOS.- Experienced troubleshooting digital and analog circuits (ADC, DAC, filters ).- Delivered instructor-led SW & HW training courses on NXP SoC devices (MPC85xx, MPC55xx).- Standardized procedures in creating, correcting, amending, and validating qualities of training materials. - Collaborated class activities with partners and silicon vendors to expand NXP SoC training programs.

- Provided engineering technical supports to embedded ARM7 and ARM9 architecture product line.- Validated existing application notes by debugging software codes and hardware configurations.- Facilitated successful transfer of technical information to our customers, field sales, and product marketers ensuring accuracy and timely delivery.

Eindhoven, Noord-Brabant, Nl

Provided problem solving, troubleshooting, and technical training supports to top-tier customers.- Provided problem solving, troubleshooting, and technical training supports to top-tier customers.- Programmed and debugged software code during initial releases of new development boards.- Debugged and analyzed customers’ software code.- Troubleshoot embedded hardware boards and schematics.- Wrote and modified BSPs and low-level device drivers for various PowerPC SoC silicon systems.- Developed and conducted 3-day training classes for NXP PowerPC SoC (MPC82xx, MC683xx, MPC8xx).- Conceived, created, and tested application notes for various PowerPC silicon devices.

- Developed application notes to ease integration of T1/ISDN chip sets to various communication applications.- Translated engineering requirements into working specifications leading to product development.- Supported trade shows and grew customers' relations to better understand their applications, helping formulate company product strategies.

Build the digital logic and digital layout circuit for CMOS data and Telecommunication devices.- Designed the digital section and circuit of an Analog front-end echo cancellation modems. + Co-authored a publication “An Analog Front End for 9.6 kbps Echo Cancellation Modems. 1988 International Solid-State Circuit Conference (ISSCC 1988).- Designed the entire Serial I/O port expander for an automotive engine controller from specification.- Collaborated designing and developing an 8-bit 6502 circuitry for Digital Signal Processor application.- Experienced with Rockwell CAD/CAE tools such as SPICE circuit simulation, and the Calma GDS layout systems.

Falls Church, Va, Us

Member of a team that designed & created a radiation-hardened, & portable voice/data communication chip sets.- Designed the digital circuitry of a CMOS customized 5-chip set.- Used Litton in-house CAD equipment, logic simulation, circuit simulation, layout, and macro generator and auto router application programs to create the PG tapes of the 5-chip set.- Tested and debug the 5-chip set once received from the foundry to ensure proper function.- Secret Clearance.

El Segundo, California, Us

Responsible for the integrity and quality assurance of Bipolar and CMOS processes focusing on wafer yields and DC test characteristics of silicon devices.- Performed failure analysis relating to Photoresist, Diffusion and Metallization processes. Developed methods and techniques to increase die yields.- Created BASIC test programs & wrote test procedures to evaluate quickly pass/fail wafer DC performances. The task contributed to reducing the cycle time to complete DC test qualification.- Led a small team to researched statistical correlation between wafer fabrication process targets and device electrical performances. The success of the project resulted in high die yield during electrical testing phase.

Mba, Mba With Emphasis In Marketing

Bs, Electrical Engineer