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David Glasco is listed as Vice President, Compute Solutions Group at Cadence Design Systems at Cadence Design Systems, based in Austin, Texas, United States. AeroLeads shows a work email signal at cadence.com and a matched LinkedIn profile for David Glasco.
David Glasco previously worked as Vice President, Compute Solutions Group at Cadence Design Systems and Vice President, Tensilica IP Group at Cadence Design Systems. David Glasco holds Phd, Electrical Engineering from Stanford University.
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AeroLeads found 1 current-domain work email signal for David Glasco. Compare company email patterns before reaching out.
A visionary executive with over 25 years of hands-on experience managing teams, creating business strategies, defining compelling products, leading research and advanced development efforts, engaging and negotiating with customers and partners, and building and reinventing organizations. Experience managing teams of over 600 engineers. Significant technical leadership across a wide range of product lines with a strong track record of innovative strategies and product designs. Delivered many successful products over the last 35 years such as Tesla’s Autopilot SoC, NVIDIA GPU memory architectures, and multiple SoC architectures and designs, resulting in substantial revenue and product cost savings. 100+ patents.
Listed skills include Processors, High Performance Computing, Hardware Architecture, Computer Architecture, and 27 others.
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San Jose, California, US
Leading the Compute Solutions Group (CSG), part of the Silicon Solutions Group (SSG) at Cadence.Responsible for the hardware and software design and development for Cadence’s complete soft IP portfolio including the Neo NPU and NeuroWeave AI Compiler, Tensilica DSPs and DSP Libraries, Memory Controllers, Interface Controllers, Xtensa Microcontrollers and.
San Jose, California, US
Leading the Tensilica IP Group.We are growing the Tensilica family to deliver system solutions, and we are looking for world-class software and hardware engineers to help define and implement all aspects of processing systems from DSP, AI, CPU, Security, and multi-core to enabling faster time to market for the next wave of SOCs across a wide range of.
Cedar Park, Texas, US
Terradepth is building a fleet of networked, autonomous underwater vehicles.
Seattle, WA, US
Developed a strategy to rapidly deliver the Kuiper 5G Modem SoC design. Built a new design center and team in Austin for the project. Negotiated contracts for IP licensing and design service support. Worked closely with internal customers and partners to keep the project on track. Provided technical and project leadership for the effort.
Mountain View, California, US
Rebuilt the engineering organization and brought in new talent to strengthen the team and the effort to deliver an energy-efficient machine learning inference SoC. Negotiated contracts for 3rd party IP licensing, worked closely with key customers, participated in funding efforts, and presented to the board of directors.
San Jose, California, US
NetSpeed developed SoC design tools and a highly configurable SoC interconnect fabric.
Austin, Texas, US
Developed the vision and supporting strategy to deliver Tesla’s Full-Self-Driving (FSD) Autopilot SoC product. Built a world-class design team and led the development of the Autopilot SoC, which significantly outperformed the competition and resulted in a significantly lower-cost product. Negotiated multiple IP licensing and design services contracts and.
Santa Clara, California, US
Responsible for AMD’s Server Architecture organization. Rebuilt the organization by reorganizing several existing teams and growing additional teams. Worked across AMD to develop a strong server vision, strategy, and roadmap for the next-generation server.
Santa Clara, CA, US
Leading the Hardware Architecture and RTL design groups for the mobile Computational Imaging group at NVIDIA. Working to create cool new imaging capabilities in our mobile devices.
Santa Clara, CA, US
Leading a research team designing cool GPUs for the future. Building a team to focus on all aspects of the system design - architecture, implementation, circuit technology, compilers, system software, and more.
Santa Clara, CA, US
Architecture, analysis and design of high performance Graphic Processing Units (GPUs). Architecture of trusted systems.
Chief Architect for the Horus chipset which enables 32-way AMD Opteron-based cache coherent multiprocessor systems. Technical Manager of the Horus design team and the Newisys Hardware Architecture Team.
Santa Clara, California, US
Technical manager responsible for building and leading an engineering team responsible for the system components of a high-performance IA-32 processor with an integrated memory controller and micro-architectural support for multiple heterogeneous on-die cores.
Armonk, New York, NY, US
Built a research team that successfully implemented and demonstrated IBM’s first Intel-based CC-NUMA and IBM’s first PowerPC-based CC-NUMA systems. The team architected, designed, and implemented the system using a combination of off-the-shelf components and FPGAs. Migrated NUMA technology into IBM’s product groups.
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David Glasco works for Cadence Design Systems.
David Glasco is listed as Vice President, Compute Solutions Group at Cadence Design Systems at Cadence Design Systems.
AeroLeads has found 1 work email signal at @cadence.com for David Glasco at Cadence Design Systems.
David Glasco is based in Austin, Texas, United States while working with Cadence Design Systems.
David Glasco has worked for Cadence Design Systems, Terradepth, Amazon, Esperanto Technologies, Inc, and Netspeed Systems.
You can use AeroLeads to view verified contact signals for David Glasco at Cadence Design Systems, including work email, phone, and LinkedIn data when available.
David Glasco holds Phd, Electrical Engineering from Stanford University.
David Glasco is listed with skills including Processors, High Performance Computing, Hardware Architecture, Computer Architecture, Microprocessors, Gpu, System Architecture, and Architecture.
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